The switching pulses in the inductor current or capacitor voltage cause the polarity to reverse the applied switch current or voltage and thus a zero current mode is achieved. We have also calculated the output transfer function of the boost converter which can be further used for controller design. Then, parasitic effects are considered for the Boost Converter and accordingly, its various transfer functions (Control, Output Impedance, etc.) and various signal diagrams are presented and compared to ideal cases.

A Buck converter is a step-down DC-DC converter consisting mainly of an inductor and two switches (usually a transistor switch and a diode) for controlling the inductor. When the switch pictured above is closed (i.e. On state), the voltage across the inductor is VL = Vi − Vo. A boost converter (step-up converter), as the name suggests, boosts the DC input voltage value and supplies it at the output.

During the ON period, the switch is closed, resulting in an increase in the inductor current. During the OFF period, the Switch is brought to open and hence the only path for inductor current to flow is through the flyback diode 'D' and the parallel combination of capacitor and load. When the switch is turned OFF, the inductor is brought into contact with the capacitor and the load to energize the load and discharge capacitor.

A dc-dc converter is said to work in DCM, if the inductor current reaches zero and stays there for a certain amount of time.

About the thesis

## STATE SPACE AVERAGING

Procedure For State-Space Averaging

## ANALYSIS IN DCM MODE

*Overview**Framework**Reduced Order Model**Full Order Model**Framework:-**Reduced Order Model:-*

This occurs when the load current requirement is very low for certain operations such as in the case of SMPS used in computers, inverters require a very low current during Hibernation or Sleep Mode and switching ripples in inductor current or capacitor voltage cause the polarity of the applied switching current or voltage and thus a zero current mode is reached which gives its name DCM. These models can be classified either analytically [3], [5] or equivalent circuit form [4], [6] and can be grouped into two main sections such as:-. The inductor current does not appear as a state variable in reduced order model, which is undesirable for those applications where the main control target is inductor current.

Unlike a reduced order, the inductor current of the full model is preserved and is much more accurate compared to the reduced model. In DCM, in addition to two modes as in CCM, there is a third mode of operation in which the capacitor voltage or inductor current is zero. For DCM operation, during the first interval (i.e. ON period) the switch turns on and the inductor current rises and peaks when the switch is about to turn off, and resets to zero at the end of the OFF cycle period of time.

That way we can eliminate state variables and get a model that can be expressed in mean state variables. The function describing this dependency is commonly referred to as the duty ratio constraint. In the state space averaging technique in DCM, we only average the matrix parameter and not the state variables.

Note that when the switch is on, the current supplied to the capacitor is not necessarily the same value as the average inductor current. Since the inductor current charges rapidly with time, it is quite easy to derive the capacitor equation using the "charge conservation" principle, and then an averaging step is performed. From model (4), we can define the state-space averaged (SSA) charging current as the average of the inductor current multiplied by the turn-on ratio for which the inductor charges the capacitor.

It can be implied that a 'charge conservation' law is violated in unmodified SSA, as the averaging step is done on a full model, resulting in mismatch of responses with average response of DC-DC converters. From these calculations for buck and boost converters, it can be seen that inductor current dynamics vanish, resulting in a degenerate model. Since inductor current is not present in state variable in this reduced order model, it must be replaced by expressing it as an algebraic function of other variables, thus removing inductor dynamics.

Reduced Order Averaged Model for Buck Converter

## Reduced Order Averaged Model for Boost Converter

### NEW FULL ORDER AVERAGED MODELS:-

Limitations of reduced order model is that although it can correctly predict DC and low frequency behavior of PWM converters, at high frequencies, it is unable to capture the dynamics of boost and buck converter. However, full-order models can predict the high-frequency responses very well and are therefore desired. This constraint differs from the earlier one derived for a reduced order model showing that it enforces the correct average charging of output capacitor.

DC analysis

Load in Boost Converter

## Inclusion of Parasitic In Model

*Overview**Transfer functions derivation considering parasitics**Overview:-**Parasitic Realization in DC-DC Converters:-*

When modeling converter systems, due to the various problems encountered in the complexity and modeling process, parasitics such as switching conduction voltages, conduction resistance, diode and resistance drops, switching times and ESR of capacitors are usually not taken into account [8]. The idea of considering ideal/lossless components and leaving the parasitic ones, as we derived the model earlier, significantly simplifies the development of the model and is very important as it contributes to the understanding of the main characteristics of the switching system [9]. Most common models (such as the reduced-order and full-order models) are suitable for this purpose.

So there is no doubt that these designs are successful in designing the primary stage of a switching system. The problem with parasitic inclusion leads to non-linear current/voltage waveforms and further complicates analytical derivations.

First, we examined various aspects of the average modeling of a DC-DC (buck and boost) converter operating in discontinuous translation mode. Averaging the parameters of the matrix and selecting the correction matrix (K) according to the number of inductor currents of the converter. Representation of state space equations in differential equations of inductor current and capacitor voltage.

Defining a duty ratio constraint so that the expression consists of only one duty ratio. We plotted different bode diagrams for the reduced mean model and the new full order model and found that the reduced order can estimate the behavior in the low frequency range, but in the new order model, since the inductor dynamics are present, it more accurately. We also modeled the load to a constant current source and parallel resistance to obtain the output impedance transfer function that can be used for controller design.

Then, various parasitic components are considered and a full order model is developed. By comparing IDEAL and NON-IDEAL model behavior through bode plot of control transfer function, we have found that the model verifies the fact that the dc gain decreases in case of parasitic.