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Professional Electives


62 Electronic Counters.


Virtual instrumentation (VI) – Definition, flexibility – Block diagram and architecture of virtual instruments – Virtual instruments versus traditional instruments – Software in virtual instrumentation - VI programming techniques – DAQ cards for VI applications – DAQ modules with serial communication.

Unit-VI: TelemetryAnd IoT [4 L]

General telemetry system – voltage, current and position telemetry systems – Radio frequency telemetry – Frequency modulation, pulse-amplitude modulation and pulse-code modulation telemetry – Frequency and time multiplexing. Introduction to industry automation and internet of things (IoT).

Course Outcomes (Cos)

After successful completion of this course, students will be able to

 Understand and analyze instrumentation systems and their applications to various industries.

 Use different measuring instruments

Text Books:

1. A.D. Helfrick and W.D. Cooper, Modern Electronic Instrumentation and Measurement Techniques, Prentice Hall India Private Ltd., New Delhi, 2010.

2. David A Bell, “Electronic Instrumentation and Measurements”, Oxford University Press, 2013.

3. Jerome J., Virtual Instrumentation using Lab VIEW, Prentice Hall India Private Ltd., New Delhi, 2010.


1. H.S. Kalsi, Electronic Instrumentation, Tata McGraw-Hill, New Delhi, 2010.

2. J. J. Carr, Elements of Electronic Instrumentation and Measurement, Pearson Education India, New Delhi, 2011.

3. M .M. S. Anand, Electronics Instruments and Instrumentation Technology, Prentice Hall India, New Delhi, 2009. 4. Sanjay Gupta, Virtual Instrumentation using Lab view, Tata McGraw-Hill Education, 2010.

ECX5111 Computer Organization and Architecture

L-T-P: 3-0-0; Cr: 03

Course Objectives:

The objective of this course is to provide the students the exposure of organization and architecture of MIPS based modern computers and microprocessors. This course attempts to bridge the knowledge gap of the students between the functionality computer hardware and performance of a typical high level language.

Further, this course aims to provide brief introduction to the latest topics like cluster computing, GPU, etc.

63 Course Outcome:

Upon completion of the course, students should posse the following knowledge and skills:

An understanding of a machine's instruction set architecture including basic instruction fetch and execute cycles, instruction formats, control flow, and operand addressing modes.

The ability to create, assemble, execute, and debug assembly language programs along with a basic understanding of the assembly, linker, and loader processes.

An understanding of the design and functioning of a machines central processing unit (CPU) including the datapath components and the control unit.

An understanding of basic input/output functioning including program controlled I/O and interrupt I/O.

An understanding of organization of memory hierarchies including the basics of cache design.

Analyze the performance of processors and caches COURSE CONTENTS:

UNIT I (3 L)

Introduction: Performance of a computer; Semiconductor technology and Moore’s Law; Evolution of computer; Function and structure of a computer; Interconnection of components; Performance of a computer;

High-level language, assembly language, and machine language.


Instruction Set: Operations of computer hardware; Operands of computer hardware; Representing instructions in computer; Review of signed/unsigned integers; Binary addition and subtraction, carry and overflow;

Logical operations; Decision making; Loop; Sub-routine.


MIPS Assembly Language Programming: Introduction to operating system; Compiling, assemblining, linking, and loading; The SPIM Simulator; Compilation of C code


ALU Design: Addition and subtraction of signed and unsigned integer; Integer multiplication, unsigned and signed multiplication, Booth’s algorithm, sequential multiplier hardware, faster hardware multiplier; Integer division, sequential divide hardware; Integer multiplication and division in MIPS. Floating point representation and IEEE 754 standard, normalized and de-normalized numbers, zero, infinity, NaN; FP comparison, FP addition; Floating point MIPS instructions; Un-optimized and optimized C code for matrix multiplication.

UNIT V (7 L)

Processor Design Aspects: Datapath components; Clocking methodology; Designing single-cycle datapath;

Control signals and Control unit; Multi-cycle instruction execution; CPI of a multi-cycle processor;

Performance comparison of a single-cycle versus a multi-cycle processor; Pipelining versus serial execution;

Introduction to MIPS 5-stage pipeline; Pipeline performance; Pipelining hazards; Pipelining vs. instruction level parallelization.


Memory Organization: MIPS addressing modes; Main memory organization and performance; SRAM, DRAM, Latency and bandwidth; Memory hierarchy; Cache memory, Virtual memory; Cache memory organization: direct-mapped, fully-associative, and set-associative caches, handling cache miss; Cache performance, memory stall cycles, and average memory access time; Virtual machine.


I/O Organization: Accessing of I/O devices; Interrupts; Direct memory access; Buses; Interface circuits;

64 Standard I/O interfaces (PCI, SCSI, USB).


Advanced Topics: Difficulty of creating parallel processing programs; Parallelism - Multicores, Clusters, Graphics Processors (GPUs); Flynn classification; RAID configuration of hard disks

Text Books:

1. Computer Organization and Design: The Hardware Software Interface, David Patterson and John Hennessy, Morgan Kufmann, 5th Edition.

2. Computer System Architecture, Morris Mano, Prentice-Hall India, Eastern Economy Edition.

Reference Books:

1. Computer Architecture and Organization, John P Hayes, McGraw-Hill International Editions, Computer Science Series.

2. Computer Organization, Carl Hamacher, Zvonko Vranesic & Safwat Zaky, Mc Graw Hill.

3. Computer Organization and Architecture, William Stallings, Pearson Education.

4. Aho, A., R. Sethi, and J. Ullman [1985]. Compilers: Principles, Techniques, and Tools, Reading, MA:


5. Sweetman, D. [1999]. See MIPS Run, San Francisco, CA: Morgan Kaufmann Publishers.

ECX5112 Semiconductor Device Modelling L-T-P: 3-0-0; Cr: 03 Prerequisites:1. Solid State Devices and Circuits

Course Objectives:

The course will provide adequate understanding of semiconductor devices and their modelling aspects, useful for designing devices in electronic, and optoelectronic applications.

Course Outcomes:

Upon Completion of the course, students will be able to:

Analyse MOSFET functionalities and physics Understand Short Channel Effects (SCEs) Design Scaled MOSFETs.

Design flow for MOSFET Virtual Fabrication flow.

Analyse performance of special optoelectronics devices.


Unit I: MOS Capacitor: (8 L)

Energy band diagram of Metal-Oxide-Semiconductor contacts, Mode of Operations: Accumulation, Depletion, and Inversion, 1D Electrostatics of MOS, Depletion Approximation, CV characteristics of MOS, LFCV and HFCV. Non-idealities in MOS, oxide fixed charges, interfacial charges, Midgap gate Electrode, Poly-Silicon contact, inversion layer quantization, quantum capacitance.

Unit II: Physics of MOSFET: (12 L)

Physics of MOSFET: Energy Band Diagram(E-K) of Silicon, Concept of effective mass, fermi and quasi-fermi levels, Drift-Diffusion Approach for IV, Gradual Channel Approximation, Sub-threshold current and slope, Body effect, Detail 2D effects in MOSFET, High field and doping dependent

65 mobility models, High field effects and MOSFET reliability issues (SILC, TDDB, & NBTI).

Unit III: Metal-semiconductor junctions: (8 L)

Rectifying and ohmic contacts, role of surface states, application in energy level characterization;

Comparison of p-n junction and Schottky diodes.

Unit IV: Leakage mechanisms: (6 L)

Leakage mechanisms in thin gate oxide, High-K-Metal Gate MOSFET devices and technology issues, MOSFET capacitances and resistances, properties of junction and ohmic & schottky contact, tunneling, fowler-nordheim tunneling, direct tunneling

Unit V MOS Scaling: (8 L)

Basic physics of MOS transistors scaling, charge sharing effect (CSE), narrow and reverse narrow width effect, SCE, DIBL, GIDL, mobility degradation due to gate field, hot electron effect and velocity saturation, channel in-homogeneity, velocity overshoot, tunneling through oxide.

Unit V SOI MOSFET: (8 L)

FDSOI and PDSOI, 1D Electrostatics of FDSOI MOS, VT definitions, Back gate coupling and body effect parameter, IV characteristics of FDSOI-FET, FDSOI-sub-threshold slope, Floating body effect.

Text Books:

1. Solid State Electronic Devices, 6th Edition, Ben Streetman, University of Texas, Austin Sanjay Banerjee, University of Texas at Austin, 2006.

2. S.M. Sze & Kwok K. Ng, Physics of Semiconductor Devices, Wiley, 2007.

3. Semiconductor Physics and Devices, Basic Principles, Third Edition, Donald A. Neamen, 2004.

Reference Books:

1. Yuan Taur & Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge 2013 2. Mark Lundstrom & Jing Guo, Nanoscale Transistors: Device Physics, Modeling & Simulation, Springer 2006

3. Yannis Tsividis, Operation and Modeling of the MOS Transistor, Oxford University Press, 2010

ECX5113 Linear Integrated Circuits L-T-P: 3-0-0; Cr: 03 Prerequisites:1. Elements of Electronics Engineering

Course Objectives:

To introduce the basic building blocks of linear integrated circuits.

To learn the applications of operational amplifier.

To introduce the theory of Filters and PLL.

To learn the theory of OTA.

To introduce the concepts of waveform generation and introduce some special function ICs.

Course Outcomes:

Upon Completion of the course, students will be able to:

Design linear and non-linear applications of op – amps.

Design Filters using op-amp

66 Design Amplifier using OTA.

Design Filters using OTA

Analyse performance of special function ICs.


Unit I: Operational Amplifiers: (8 L)

Current mirror and current sources, BJT Differential amplifier with active loads. Basic information about operational amplifiers, Ideal Operational Amplifier, General operational amplifier stages and internal circuit diagrams of IC 741, DC and AC performance characteristics, Integrator, Differentiator, Logarithmic amplifier, Antilogarithmic amplifier, Instrumentation amplifier.

Unit II: Comparators and converters (8 L)

Basic comparator, Zero crossing detector, Schmit Trigger, Voltage limiters, V to F and F to V converters, Clippers and clampers, Peak detector, sample and hold circuit, A to D and D to A converters.

Unit III: Active Filters: (8 L)

Low-pass, high-pass, band-pass and Band elimination filter. Butterworth filters. Universal active filters. Switched capacitor filters- resistor realization, switched capacitor integrator, switched capacitor filter ICs.

Unit IV: Phase Locked Loop (PLL): (4 L)

Operation of the basic PLL, Voltage controlled oscillator, Monolithic PLL IC 565, application of PLL.