Suggested Books : Text Books
6. Microsystems Fabrication Processes: Introduction, Photolithography, Diffusion, Oxidation, Chemical vapour deposition
6
Total 42
Reading:
1. Tai-Ran Hsu, MEMS and Microsystems, 2nd Edition, Wiley, 2008.
2008 2. Mohamad Gad El Hak, MEMS Design and Fabrication, 2nd
Edition, CRC Press, 2006.
2006
Course Outcomes: Upon completion of this course, students will be able to:
CO1: Understand the fundamentals and working principles of MEMS and Microsystems
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
144 CO2: Explore Microsystem Design through different engineering science
CO3: Analyze the Sequential Circuit Performance
CO4: Design Arithmetic Building Blocks for Microsystems CO5: Study the Microsystems Fabrication Processes
EC400162 Embedded System Design L-T-P: 3-0-0; Cr: 03
Prerequisite: NIL
Objective: The goal of this course is to understand the concept of embedded system design, Input-Output devices and mechanisms, conversion analog to digital and digital to analog, embedded systems software, real time OS, system verification and ARM micro-controller.
Sl.
No.
Contents Contact
Hours
1.
UNIT-1 Embedded Processing – Evolution, Issues and Challenges; System and Processor Architecture: von Neumann, Harvard and their variants, Memory Architecture and Devices.
5
2.
UNIT-2 Input-Output Devices and Mechanisms, Instruction Set and Addressing Modes, Interfacing of Memory and Peripheral Devices – Functional and Timing Issues, Application Specific Logic Design using Field Programmable Devices and ASICs.
7
3. UNIT-3 Analog to Digital and Digital to Analog Converters, Bus I/O and Networking Considerations Bus and Wireless Protocols.
4
4.
UNIT-4 Embedded Systems Software: Constraints and Performance Targets, Real-time Operating Systems: Introduction, Scheduling in Real- time Operating Systems, Memory and I/O Management: Device Drivers.
5
5. UNIT-5 Embedded Software Development: Flow, Environments and Tools, System Specification and Modeling, Programming Paradigms
4 6. UNIT-6 System Verification, Performance Analysis and Optimization:
Speed, Power and Area Optimization, Testing of Embedded Systems
5
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
145 7. UNIT-7 ARM Microcontroller Architecture: Getting Started with the
ARM Microcontroller Architecture, Memory organization in the ARM, ARM Instruction Set - Types of instructions and addressing modes, Programming ARM Microcontroller, General structure of a program, Program Download Mechanisms, Writing Programs, Register Level Programming of the Digital IO peripheral
12
Total 42
Suggested Books:
Text Books :
1. Designing Embedded Hardware 2nd Edition by John Catsoulis, O'Reilly Media, Print ISBN: 978-0-596-00755-3.
2005 Reference Books :
1.
Embedded System Design: A Unified Hardware/Software Approach by Frank Vahid and Tony Givargis, John Wiley & Sons; ISBN:
0471386782.
2002 2. Joseph Yiu, The Definitive Guide to ARM® Cortex®-M3 and Cortex®-
M4 Processors, Newnes; 3rd edition
2013
Course outcomes (COs): Upon completion of this course, students will be able to:
CO1: Understand the fundamentals of embedded system design
CO2: Study the basic concept of Input-Output devices and mechanisms, instruction set and addressing Modes.
CO3: Design Analog-to-Digital and Digital-to-Analog Converters CO4: Verify the performance of Real-time Operating Systems CO5: Analyze and optimize the performance of Embedded Systems CO6: Design ARM Microcontroller.
EC400163 VLSI Architecture L-T-P: 3-0-0; Cr: 03
Pre-requisite: Digital Integrated Circuits
Objectives: To provide knowledge VLSI Architecture design and methodologies for different Blocks.
Sl. Contents Contact
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
146
No. Hours
1 Computer arithmetic architectures: Integer and Floating point arithmetic, Fast adder/subtractors, sequential and array multipliers & dividers, square root, Absolute difference value, CORDIC.
8
2 Introduction to design and implementation methodologies; Architectural mapping with case studies: Data path, Control path synthesis; Control strategies;
Hardware implementation of various control structures; Micro-program control techniques; Design issue: Timing, Area, power; FSM Architecture and Synthesis, Semiconductor Memory and Peripheral Architectures.
10
3 Hardware architecture design and performance analysis: Sequential/Folding architectures, bit and word serial architectures; High performance architecture pipelined, parallel and systolic array with examples; Architectural performance analysis: Throughput and latency: Low power VLSI architecture.
10
4 Basic hardware architecture for Digital Signal and Communication Systems. 6 5 Introduction to VLSI chip testing architectures: Introduction to chip fault model,
DFT architecture, BIST architecture.
8
Total Contact Hours 42
Suggested Books:
Text Books :
1. B. Randell, P. C. Treleaven, “VLSI Architecture”, Pearson 1983 Reference Books :
1. Egon Borger, “Architecture Design and Validation method”
Springer
2000 2. H. Kaeslin “Top Down Digital VLSI Design” Morgan Kaufmanl 2015 Course Outcomes: Upon completion of this course, students will be able to:
CO1: Understand the basics concept of arithmetic architectures and apply architectural mapping for hardware implementation
CO2: Design and implement Memory and Peripheral Architectures
CO3: Analyze the performance of Sequential/Folding architectures for low power VLSI CO4: Explore the hardware architecture for Digital Signal and Communication Systems CO5: Study the basic concepts of VLSI chip testing architectures
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
147 EC400164 Pattern Recognition & Machine Learning L-T-P: 3-0-0; Cr: 03
Objective: This course deals with pattern recognition which has several important applications.
For example, multimedia document recognition (MDR) and automatic medical diagnosis are two such applications.
Course Topics:
Sl.
No.
Contents Contact
Hours 1. UNIT-1 Pattern & Pattern classes, Pattern recognition Design Cycle, Feature
Extraction: Feature processing & normalization, Learning (Supervised, Unsupervised, Reinforced).
Preliminary concepts and pre-processing phases, coding, normalization, filtering, linear prediction, Feature extraction and representation thresholding, contours, regions, textures, template matching, Hidden Markov Models, Taxonomy of pattern classifiers
Performance measurement metrics: Confusion matrix, Accuracy, Precision, Recall, ROC curve, Area Under Curve (AUC), Confidence intervals.
Data partitioning ( K-fold cross validation, Leave one out , Leave m-out).
10
2. UNIT-2
Data structure for pattern recognition, statistical pattern recognition, clustering Technique and application. Study of pattern classifiers: Supervised and unsupervised.
6
3. UNIT-3
Pattern Classifiers: Statistical: Bayesian theorem, Bayesian classifier:
Minimum distance, Maximum likelihood), Naïve Bayes, Linear Discriminant Analysis, k- nearest neighbour (K-NN), Artificial Neural Network etc. and Case studies.
10
4. UNIT-4
Algorithm independent machine learning – lack of inherent superiority of any classifier, bias and variance, re-sampling for classifier design, combining classifiers Clustering techniques and algorithms
Deep learning approaches: Introduction, Architecture, Applications Selected topics from research papers
10
5 UNIT-5
Recent trends in various learning techniques of machine learning and classification methods for medical diagnosis and development of CAD system design based on embedded system and VLSI, as well as IOT related
6
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
148 applications.
Total 42
Suggested Books:
Text Books :
1. R.O.Duda, P.E.Hart and D.G.Stork, Pattern Classification, John Wiley 2001 Reference Books :
1. K. Fukunaga, Statistical pattern Recognition; Academic Press. 2000 2. Devi V.S.; Murty, M.N., Pattern Recognition: An Introduction,
Universities Press, Hyderabad
2011 3. S.Theodoridis and K.Koutroumbas, Pattern Recognition, 4th Ed.,
Academic Press
2009
Course Outcomes: Upon completion of this course, students will be able to:
CO1: Understand the characteristics of pattern recognition, machine learning
CO2: Study the basic concepts of statistical and clustering based pattern recognition model for application use
CO3: Analyze the performance of different Pattern Classifiers
CO4: Develop machine independent and unsupervised learning techniques
CO5: Build an in-depth understanding so as to apply the concept for developing real time applications such as medical diagnosis and development of CAD system design based on embedded system and VLSI, as well as IOT related problem
EC400265 FPGA Design L-T-P: 3-0-0; Cr: 03
Pre-requisite: Digital Integrated Circuits
Objectives: To provide knowledge for implementation of parameterized library cell design.
Sl.
No.
Contents Contact
Hours 1 Introduction to FPGAs: Design and implementation of FPGA, Evolution of
programmable devices, Application of FPGA.
10 2 Design Examples Using PLDs Design of Universal block, Memory, Floating
point multiplier, Barrel shifter.
8 3 Special Purpose Processors Programming technologies, commercially available
FPGAs, Xilinx’s Vertex and Spartan, Actel’s FPGA, Altera’s FLEX 10k.
10 4 Logic Block Architectures: Logic block functionality versus area-efficiency,
Logic block area and routing model, Impact of logic block functionality on FPGA performance, Model for measuring delay.
6
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
149
5 Case Study – ACTEL FPGA 8
Total Contact Hours 42
Suggested Books:
Text Books:
1. John V. Old Field, Richrad C. Dorf, Field Programmable Gate Arrays, Wiley
2008 2. Michel John Sebastian Smith, Application Specific Integrated Circuits,
Addison Wesley Professional
2008 Reference Books:
1. Stephen D. Brown, Robert J. Francis, Jonathan Rose, Zvonko G. Vranesic, Field Programmable Gate Arrays, 2nd Edition, Springer
1992
2. Related research papers -
Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Define and describe digital design flows for system design and recognise the trade-offs involved in different approaches.
CO2: Understand the basics of FPGA.
CO3: Write synthesizable verilog code, testbench to test verilog modules.
CO4: Target a verilog design to an FPGA board and analyse and debug verilog modules.
EC400266 Nanoscale Devices
L-T-P: 3-0-0; Cr: 03Pre-requisite: MOS Device Physics and Modeling
Objectives: To provide in-depth knowledge of interconnect modeling and performance analysis;
introduction and analysis of futuristic material-based interconnects such GNRs, CNTs and fiber optics.
Sl.
No.
Contents Contact Hours
1 CMOS scaling challenges in nanoscale regimes: Moore’s and Koomey's law, Leakage current mechanisms in nanoscale CMOS, leakage control and reduction techniques, process variations in devices
4
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
150 and interconnects.
2 Device and technologies for sub 100nm CMOS: Silicidation and Cu- low k interconnects, strain silicon – biaxial stain and process induced strain; Metal-high k gate; Emerging CMOS technologies at 32nm scale and beyond – FINFETs, surround gate nanowire MOSFETs, heterostructure (III-V) and Si-Ge MOSFETs. Device scaling and ballistic MOSFET: Two-dimensional scaling theory of single and multigate MOSFETs, generalized scale length, quantum confinement and tunneling in MOSFTEs, velocity saturation, carrier back scattering and injection velocity effects, scattering theory of MOSFETs.
6
3 Quantum Physics Aspects of Device: Effective mass Schrodinger equation, Matrix representation, Dirac notation, WKB Approximation, semi- classical transport in semiconductors: Boltzmann transport equation, numerical scheme, Introduction to Monte Carlo simulations.
4
4 Mathematical Techniques and Compact MOSFET models for VLSI Design: Equilibrium carrier concentration, Carrier transport, Transport Equation, Mobility and Resistivity, Carrier Generation and Recombination, High-frequency behavior of MOS transistor, Poisson equation, continuity equation, Pao and Sah’s Model, drift-diffusion equation, Small-signal equivalent circuit, Compact Model Parameters for circuit simulators, Outline of - Level 1, BSIM v3, BISIM v4, BISIM v6
10
5 Device and technologies for sub 100nm CMOS: Silicidation and Cu- low k interconnects, strain silicon – biaxial stain and process induced strain; Metal-high k gate;
6
6 Device scaling and ballistic MOSFET: Two-dimensional scaling theory of single and multigate MOSFETs, generalized scale length, quantum confinement and tunneling in MOSFTEs, velocity saturation, carrier back scattering and injection velocity effects, scattering theory of MOSFETs. Emerging nanoscale devices: Si and hetero-structure, Quasi Ballistic and Ballistic Transports, nanowire MOSFETs, carbon nanotube MOSFETs, Tunnel FET, semi-classical and quantum treatment; quantum wells, quantum wires and quantum dots; Single electron transistors, resonant tunneling devices. CMOS circuit design using non-classical devices – FINFETs, nanowire, carbon nanotubes and tunnel devices. Advanced MOSFETs: Strain Engineered Channel materials, Mobility in strained materials, Electrostatics of double gate,
10
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
151 and Fin-FET devices.
Total 42
Suggested Books : Text Books :
1 Lundstrom, M., “Nanoscale Transport: Device Modeling, and Simulation”, Springer.
2005 2 Maiti, C.K., Chattopadhyay, S. and Bera, L.K., “Strained-Si and
Hetrostructure Field Effect Devices”, Taylor and Francis.
2007 Reference Books :
1 Hanson, G.W., “Fundamentals of Nanoelectronics”, Pearson India. 2008 2 Wong, B.P., Mittal, A., Cao Y. and Starr, G., “Nano-CMOS Circuit and
Physical Design”, Wiley.
2004 3 Sandip Kundu, Aswin Sreedhar, “Nanoscale CMOS VLSI Circuits: Design
for Manufacturability” McGraw Hill
2010 4 Brajesh Kumar Kaushik, Nanoscale Devices: Physics, Modeling, and Their
Application, CRC Press
2018
Course Outcomes: At the end of this course the students would be able to:
CO1: Understand- The knowledge of challenges faced in nanoscale regime.
CO2: Analyze- Quantum physics aspects of device and overcome these challenges CO3: Create- Mathematical modeling suitable for emerging nanoscale devices.
CO4: Evaluate- Applying models on emerging devices like single electron transistor, FINFET, JLFETs.
EC400267 Current Mode Circuit Design
L-T-P: 3-0-0; Cr: 03Pre-requisite: Analog Electronics
Objectives: To provide knowledge of design current mode signal processing circuits such as filters, oscillators, active simulators and analog computational circuits.
Sl.
No.
Contents Contact
Hours
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
152 1. Limitations of voltage mode circuits, Current mode Vs voltage mode circuits,
advantages of current mode circuits, Current mirror, translinear principle, basics applications of current mode circuits
8 2. Current conveyor and their variants: first generation current conveyor (CCI),
second generation current conveyor (CCII) and third generation current conveyor (CCIII) and their applications
7 3. Current feedback operational amplifier (CFOA): Port relationship, Merits,
demirts and its applications such as realization of impedances, oscillators and filters.
10 4 Operational transconductance amplifier (OTA) and its applications in realization
of both positive and negative grounded and floating impedances, OTA-C filters and oscillators
7 5. Operational transresistance amplifier (OTRA) characteristics and their
applications such as multivibrator, filters and oscillators
6 6. Advances in the design of current mode circuits and future directions 4
Total Contact Hours 42
Suggested Books:
Text Books:
1. C. Toumazou et al., Analog IC Design: The Current-Mode Approach, IET Circuits, Devices and system Series, Peter Peregrinus Ltd
1990 2. P. V. Anand Mohan, Current-mode VLSI Analog Filters, Birkauser 2003 Reference Books :
1. Raj Senani et al., Current feedback operational amplifiers and their applications, Springer
2013
2. Related research papers -
Course Outcome: Upon successful completion of this course, students would be able to:
CO1: Understand- Develop the art of current mode VLSI circuit design and make students well versed with the fundamental building blocks of current mode VLSI circuit design.
CO2: Analyze- The different types of voltage mode and current mode circuit design and design of various current conveyors structure.
CO3: Create- The different types of design of CFOA, OTA and OTRA and their applications.
CO4: Evaluate- The potential of design of current mode circuit for future applications.
EC400268 VLSI Mixed Signal Design
L-T-P: 3-0-0; Cr: 03Pre-requisite: Nil
Objectives: To develop understanding of layout techniques with least interference among digital and analog subsystems, should be able to design a complete mixed signal system that includes efficient data conversion and RF circuits with minimizing switching and phase noise, jitter.
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
153 Sl.
No.
Contents Contact
Hours 1 Simple CMOS Current Mirror, Common-Source Amplifier, Source-Follower,
Source-Degenerated Current Mirrors, cascode Current Mirrors, MOS Differential Pair and Gain StageProcess and temperature independent compensation, Ahuza’s compensation, nested miller compensation, dynamic offset cancellation techniques. Basic Building Blocks, OpAmp, Capacitors, Switches, Non-overlapping Clocks, Basic Operation and Analysis, Resistor Equivalence of a Switched Capacitor, Parasitic-Sensitive Integrator , Parasitic- Insensitive Integrators, Signal-Flow-Graph Analysis, Noise in Switched- Capacitor Circuit
10
2 Performance of Sample-and-Hold Circuits, Testing Sample and Holds, MOS Sample-and-Hold Basics, Examples of CMOS S/H Circuits, Bipolar and BiCMOS Sample-and-Holds, Translinear Gain Cell, Translinear Multiplier, Comparator Specifications Input Offset and Noise , Hysteresis, ,Using an OpAmp for a Comparator, Input-Offset Voltage Errors, Charge-Injection Errors, Making Charge-Injection Signal Independent , Minimizing Errors Due to Charge-Injection, speed of Multi-Stage Comparators, Latched Comparators, Latch-Mode Time Constant, Latch Offset, Examples of CMOS and BiCMOS Comparators, Input-Transistor Charge Trapping, Examples of Bipolar Comparators,
8
3 Ideal D/A Converter, Ideal A/D Converter, Quantization Noise, Deterministic Approach, Stochastic Approach, Signed Codes, Performance Limitations, Resolution, Offset and Gain Error, Accuracy and LinearityIntegrating Converters, Successive-Approximation Converters, DAC-Based Successive Approximation, Charge-Redistribution A/D, Resistor-Capacitor Hybrid, Speed Estimate for Charge-Redistribution Converters, Error Correction in Successive- Approximation Converters
8
4 Multi-Bit Successive-Approximation, Algorithmic (or Cyclic) A/D Converter, Ratio-Independent Algorithmic Converter, Pipelined A/D Converters, One-Bit- Per-Stage Pipelined Converter,1.5 Bit Per Stage Pipelined Converter, Pipelined Converter Circuits,
6
5 Basic Phase-Locked Loop Architecture, Voltage Controlled Oscillator, Divider Phase Detector, Loop Filer, The PLL in Lock, Linearized Small-Signal Analysis, Second-Order PLL Model , Limitations of the Second-Order Small- Signal Model, PLL Design Example, Jitter and Phase Noise, Period Jitter , P- Cycle Jitter, Adjacent Period Jitter, other Spectral Representations of Jitter, Probability Density Function of Jitter, Ring Oscillators , LC Oscillators , phase Noise of Oscillators, jitter and Phase Noise in PLLS
10
Total Contact Hours 42
Suggested Books:
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
154 Text Books:
1. David A Johns, Ken Martin: Analog IC design, Wiley 2008 2. R Gregorian and G C Temes: Analog MOS integrated circuits for signal
processing, Wiley
1986 Reference Books:
1. Roubik Gregorian: Introduction to CMOS Op-amps and comparators, Wiley 2008
2. Related research papers -
Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Understand- The basics of mixed signal design techniques and the operation of basic building blocks for mixed signal IC design.
CO2: Create- The design of different types of ADC and DACs.
CO3: Analyze- The design of different types of PLLs, VCOs and their detailed analysis.
CO4: Evaluate- RF circuits with minimizing switching and phase noise, jitter.
20. EC400269 CAD for VLSI 3 0 0 3
Pre-requisite: Nil
Objectives: To provide knowledge on layout techniques in IC and algorithms required for circuit simulators
Sl.
No.
Contents Contact
Hours 1 Introduction: Evolution of design automation; CMOS realizations of basic
gates.
5 2 Circuit and system representation: Behavioral, structural and physical models,
design flow.
Modeling techniques: Types of CAD tools, introduction to logic simulation and synthesis.
8
3 HDL: Syntax, hierarchical modeling, Verilog/VHDL construct, simulator directives, instantiating modules, gate level modeling.
6 4 Delay modeling: Event based and level sensitive timing control, memory
initialization, conditional compilation, time scales for simulation.
Advanced modeling techniques: Static timing analysis, delay, switch level modeling, user defined primitive (UDP), memory modeling.
8
5 Logic synthesis: Logic synthesis of HDL construct, technology cell library, design constraints, synthesis of Verilog/VHDL construct.
Model optimization: Various optimization techniques, design size.
6
6 FPGAs based system design: Commercial FPGA architecture, LUT and routing architecture, FPGA CAD flow; Typical case studies.
9
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
155
Total Contact Hours 42
Suggested Books:
Text Books :
1. N. Weste, and K. Eshraghian, “Principles of CMOS VLSI Design –A Systems Perspective”, 2nd Ed., Addison Wesley
2006 2. S. Palnitkar, “Verilog HDL”, 2nd Ed., Pearson Education 2004 Reference Books :
1. Wolf, W., “Modern VLSI Design: System on Chip”, 2nd Ed., Prentice Hall of India
2002
2. Related research papers -
Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Understand- The digital IC design flow using CAD tools and the basic of VHDL language.
CO2: Analyze- The different modeling techniques.
CO3: Create- Design of digital circuits and verify using FPGA board CO4: Evaluate- Based on FPGA CAD flow and typical case studies