EC400150 Low Power VLSI Design L-T-P: 3-0-0; Cr: 03
Pre-requisite: Digital Electronics and Digital IC Design Objectives: Low power Design techniques will be discussed.
S.
No.
Contents Contact
Hours 1 Introduction, Sources of Power Dissipation, Static Power Dissipation, Low
Static/Dynamic Power Techniques, CMOS logic and Pass-Transistor Logic Families
10
2 Standard Adder Cells, CMOS Adders Architectures, Parallel Adder. 8 3 Types Of Multiplier Architectures, Parallel Multiplier, Braun, Booth and
Wallace Tree Multipliers and their performance comparison
10 4 Sources of power dissipation in SRAMs, Low power SRAM circuit techniques,
Sources of power dissipation in DRAMs
6 5 Low power VLSI design methodology - LP Physical Design, LP Gate-Level
Design, LP Architecture-Level Design, Algorithmic-Level power Reduction.
8
Total Contact Hours 42
Suggested Books:
Text Books :
1 Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, “Digital Integrated Circuits: A Design Perspective,” Prentics Hall
2016 2 Sung-Mo Kang, Yusuf Liblebici, “CMOS Digital Integrated Circuits,” Tata
Mc Graw Hill
2003 Reference Books :
1 R. Jacob Baker, “CMOS Mixed-Signal Circuit Design,” Wiley India Pvt.
Ltd.
2009 2 Ivan Sutherland, R. Sproull and D. Harris, “Logical Effort: Designing Fast
CMOS Circuits”, Morgan Kaufmann
1999 3. Pedroni, Volnei A., Circuit Design and Simulation with VHDL, 2nd
Edition, MIT Press
2011 4. J. Bhasker “A VHDL Primer” 3rd Edition, Pearson 2015 5. S. M. Sze & Kwok K. Ng., Physics of Semiconductor devices, Wiley 2007 6. M. Lundstrom & Jing Guo, Nano-scale transistors: Device Physics
Modelling and Simulation, Springer
2006
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
129 Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Understand the basic operation of MOSFET and Design CMOS adder architectures with layout rules and buffer design using logical effort
CO2: Analyze the performance parameters of Combinational logic circuits with Static/Dynamic Power Techniques.
CO3: Design Sequential circuits and estimate their performance parameters.
CO4: Estimate the stability and performance of Memories and array structures.
CO5: Identify the timing issues in digital integrated circuits and understand the basic building blocks of digital subsystem design.
EC400151 RF Microelectronics L-T-P: 3-0-0; Cr: 03
Pre-requisite: Analog Integrated Circuits
Objectives: To provide knowledge of trans-receiver architectures design, and their various components.
Course Content:
Sl.
No.
Contents Contact
Hours 1. Introduction to RFIC Design: Applications, Challenges, General
Consideration in RF Design, Key RFIC Parameters and Specification, Link Budget and Communication Distance.
4 2. Transmitter and Receiver Architectures: Review of modulation schemes,
Receiver architectures: Hetrodyne Receivers, Homodyne Receivers, Image- reject Receivers, Digital-IF Receivers and Subsampling Receiviers, Transmitter architectures: Direct-Conversion Transmitters, and Two-Step Transmitters,
6
3. Passive and Active Components for CMOS RFIC: Review of MOSFET, RF transistor layout, CMOS process, Capacitors, Varactors, Resistors, Inductors, Transformers, Transmission lines Resonance, Matching, S-parameters.
6 4. Noise and Nonlinearities: Noise and Its Spectrum, Device Noise (Current
Source and Voltage Source), Noise Figure, Noise Figure of Lossy Circuits, Noise Figure of Cascaded System, MOS Device Nonlinearity, Harmonic Distortion, Gain Compression Point, Inter-Modulation, Third Order Intercept Point, Cascaded Nonlinearity, Dynamic Range.
6
5. Low Noise Amplifiers: CMOS LNAs, Different Topologies, Noise Figure Calculation, Noise canceling LNAs, Matching and Stability.
Mixers and Detectors: Specifications, Active mixers, Passive mixers, detectors
10 6 Oscillators and Frequency Synthesizers: Voltage Controlled Oscillator, Phase
noise, Phase Locked Loops, Integer N synthesizers, Dividers.
Power Amplifiers: Basics and Class A, B, C, D, E, F and other configurations,
10 7. Relevant research paper from specific area
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
130 Power combining, Linearity Improvement Techniques.
Total Contact Hours 42
Text Books:
1. Behzad Razavi, RF Microelectronics, Pearson Education India 2013 2. R. Ludwig, RF Circuit Design, 2nd edition, Pearson Education India 2011
Reference Books:
1. R. Ludwig, RF Circuit Design, 2nd edition, Pearson Education India 2011 2. E. carey and S. Lidholm, Millimeter-wave Integrated Circuits, Springer 2005 3. B. Razavi, Design of CMOS Phase-Locked Loops, Cambridge University
Press, New York, USA
2020
4. Related research papers -
Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Apply the concepts and design techniques presented in this course to a wide range of applications including high-speed wireless communications.
CO2: Understand the design bottlenecks specific to RF IC design, linearity related issues, ISI and familirity with the 50 ohm environment.
CO3: Identify noise sources; develop noise models for the devices and systems. Also specify noise and interference performance metrics like noise figure, IIP3 and different matching criteria.
CO4: Comprehend different multiple access techniques, wireless standards and various transceiver architectures.
CO5: Design various constituents’ blocks of RF receiver front end
EC400152 Organic Electronics L-T-P: 3-0-0; Cr: 03
Pre-requisite: MOS Device Physics
Objectives: Study, modeling and simulation of organic material based devices and circuits.
Acquaint the students with the conducting polymers, small-molecules, organic materials, different structures of OFETs, OLEDs and various applications of organic thin film transistors.
Sl.
No.
Contents Contact Hours 1. Organic and Inorganic Materials & Charge Transport:
Introduction; Organic Materials: Conducting Polymers and Small 8
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
131 Molecules, Organic Semiconductors: p-type, n-type, Ambipolar
Semiconductors, Charge Transport in Organic Semiconductors, Charge Transport Models, Energy Band Diagram, Organic and inorganic materials for: Source, Drain and Gate electrodes , Insulators, Substrates ; Comparison between Organic and Inorganic Semiconductors.
2. Device Physics and Structures: Organic Thin Film Transistors:
Overview of Organic Field Effect Transistor (OFET); Operating Principle;
Classification of Various Structures of OFETs; Output and Transfer Characteristics; OFETs Performance Parameters: Impact of Structural Parameters on OFET; Extraction of Various Performance Parameters, Advantages, Disadvantages and Limitations.
8
3. Organic Device Modeling and Fabrication Techniques:
Modeling of OTFT Different Structures, Origin of Contact Resistance, Contact Resistance Extraction, Analysis of OFET Electrical Characteristics, Validation and Comparison of OFETs. Organic Devices and Circuits Fabrication Techniques.
8
4. OLEDs and Organic Solar Cells
Organic Light Emitting Diodes (OLEDs): Introduction; Different Organic Materials for OLEDs; Classification of OLEDs, Output and Transfer Characteristics; Various Optical, Electrical and Thermal properties, Advantages, Disadvantages and Limitations.
Organic Solar Cells: Introduction, Materials, various properties, Characteristics, Advantages, Disadvantages and Limitations and Applications;
10
5. OTFT Applications
Organic Inverters: Inverter Circuits based on Different Materials Combination and Configurations; All-p-type, Organic Complementary Inverter Circuits, Hybrid Complementary Inverters, Comparison between All P-Type, Fully Organic and Hybrid Complementary Inverter Circuits;
Logic Circuit Implementation; Organic Memory: Organic Static Random Access Memory (OSRAM) Organic DRAM, Shift registers and other Important Organic Memory Designs. OTFT as Driver for organic Light Emitting Diodes (OLEDs). Addition of More Applications based on Recent Technology Development.
8
Total 42
Suggested Books:
Text Books
1. Hagen Klauk, Organic Electronics: Materials, Manufacturing and Applications, Wiley-VCH Verlag Gmbh & Co. KGaA, Germany.
2006 2. Klaus Mullen, Ullrich Scherf, Organic Light Emitting Devices:
Synthesis, Properties and Applications, Wiley-VCH Verlag
2005
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
132 Gmbh & Co. KGaA, Germany.
Reference Books
1. Hagen Klauk, Organic Electronics II: More Materials and Applications, Wiley-VCH Verlag Gmbh & Co. KGaA, Weinheim, Germany, 2012
2012
2. Flora Li, Arokia Nathan, Yiliang Wu, Beng S. Ong, Organic Thin Film Transistor Integration: A Hybrid Approach, Wiley- VCH, Germany; 1st Ed.
2011
3. Wolfgang Brutting, Physics of Organic Semiconductors, Wiley.
2005 4. Dresselhaus, M.S., Dresselhaus, G. and Avouris, P., Carbon
Nanotubes: Synthesis, Structure, Properties and Applications.
2001
Course Outcomes: At the end of this course , students would be able to:
CO1: Apply the concepts and organic & inorganic materials presented in this course to a wide range of applications including sensors and transistors.
CO2: Familiarized with the OLED designing aspects.
CO3: Understand the Organic and Inorganic Materials & Charge Transport.
CO4: Identify various structures of OFETs for the devices.
CO5: Design various types of organic inverters.
EC400153 VLSI Technology L-T-P: 3-0-0; Cr: 03
Pre-requisite: Basic VLSI Fabrication Processes.
Objectives: To provide knowledge of various processes and techniques for VLSI fabrication technologies.
S. No. Contents Contact
Hours 1. Introduction to VLSI technology: Device scaling and Moore’s law,
basic device fabrication methods, alloy junction and planar process.
5 2. Crystal growth: Czochralski and Bridgman techniques, Characterization
methods and wafer specifications, defects in Si and GaAs.
5 3. Oxidation: Surface passivation using oxidation. Deal-Grove model, oxide
characterization, types of oxidation and their kinematics, thin oxide growth models, stacking faults, oxidation systems.
8 4. Diffusion and ion-implantation: Solutions of diffusion equation, diffusion
systems, ion implantation technology, ion implant distributions, implantation damage and annealing, transient enhanced diffusion and rapid thermal processing. Epitaxy and thin film deposition:
Thermodynamics of vapor phase growth, MOCVD, MBE, CVD, reaction rate and mass transport limited depositions, APCVD/LPVD, equipment and applications of CVD, PECVD, and PVD.
8
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
133 5. Etching: Wet etching, selectivity, isotropy and etch bias, common wet
etchants, orientation dependent etching effects; Introduction to plasma technology, plasma etch mechanisms, selectivity and profile control plasma etch chemistries for various films, plasma etch systems.
Lithography: Optical lithography contact/proximity and projection printing, resolution and depth of focus, resist processing methods and resolution enhancement, advanced lithography techniques for nanoscale pattering, immersion, EUV,electron, X-ray lithography.
8
6. Study of various MEMS Processes: Surface micro-machining, bulk micro-machining, LIGA, an-isotropic etching, MEMS Structures and devices.
8
Total Contact Hours 42
Suggested Books:
Text Books:
1. Plummer, J.D., Deal, M.D. and Griffin, P.B., “Silicon VLSI Technology: Fundamentals, Practice and Modeling”, 3rd Ed., Prentice-Hall.
2000 2. Sze, S.M., “VLSI Technology”, 4th Ed., Tata McGraw-Hill. 1999 Reference Books :-
1. Chang, C.Y. and Sze, S.M., “ULSI Technology”, McGraw-Hill. 1996 2. Gandhi, S. K., “VLSI Fabrication Principles: Silicon and Gallium
Arsenide”, John Wiley and Sons.
2003 3. Campbell, S.A., “The Science and Engineering of Microelectronic
Fabrication”, 4th Ed., Oxford University Press.
1996 4. Chang Liu, ‘Foundations of MEMS’, Pearson Education Inc. 2012 5. Stephen D Senturia, ‘Microsystem Design’, Springer Publication, 2000
Course Outcomes: At the end of this course, students would have knowledge of VLSI technologies, various processes involving the fabrication of a device. Upon successful completion of the course, the students will be able to:
CO1: Identify the various design limits material used for fabrication.
CO2: Describe the Performance of technology scaling.
CO3: Understand the complexities involved in the integrated circuits.
CO4: Identify and analyze the various steps for the fabrication of various components CO5: Assess the various reliability issues in VLSI technology
EC400154 2D Materials for Nanoelectronic Device Applications L-T-P: 3-0-0; Cr: 03 Pre-requisite: MOS Device Physics and Modeling and Semiconductor Materials, Devices &
Characterization
Objectives: To provide knowledge of present extensive, state-of-the-art coverage of the fundamental and applied aspects of this exciting field.
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
134 Sl.
No.
Contents Contact
Hours 1. Unit I: Basics of Materials
Crystal Systems, Unit Cells, Bravias Lattices, Crystallographic Planes, Miller Indices, Space Groups, Crystalline and Amorphous Materials Bonds in the Materials: Metallic, Ionic- Covalent and Van-der-Waals Bonds, Crystal Defects, Energy at the Nanoscale - Quantum Confinement Effects – Classifications of Nanosystems -1D- 2D- 3D Nanomaterials – Size Dependent Properties of Nanomaterials.
8
2. GRAPHENE: Theory of the Structural, Electronic, and Transport Properties of Graphene Epitaxial Graphene: Progress on Synthesis and Device Integration, Metal Contacts to Graphene, Graphene for RF Analogue, High-Field and Thermal Transport in Graphene
7
3. TRANSITION METAL DICHALCOGENIDES: Theoretical Study of Transition Metal Dichalcogenides, Physico-Chemical Characterisation of MoS2/Metal and MoS2/Oxide Interfaces Transition Metal Dichalcogenide Schottky Barrier Transistors: A Device Analysis and Material Comparison
10
4 TMD-Based Photodetectors, Light Emitters, and Photovoltaics Optoelectronics, Mechanical Properties, and Strain Engineering in MoS2 Device Physics and Device Mechanics for Flexible TMD and Phosphorene Thin-Film Transistors
7
5. NOVEL 2D MATERIALS: Structural, Electronic, and Transport Properties of Silicene and Germanene, Group IV Semiconductor 2D Materials: The Case of Silicene and Germanene, Stanene: A Likely 2D Topological Insulator.
6
6. Phosphorene: A Novel 2D Material for Future Nanoelectronics and Optoelectronics, 2D Crystal-Based Heterostructures for Nanoelectronics
Cinzia Casiraghi and Freddie Withers
4
Total Contact Hours 42
Suggested Books:
Text Books :
1. Michel Houssa, Athanasios Dimoulas, Alessandro Molle, 2D Materials for Nanoelectronics, 1st Edition, CRC Press
2016 2. Graphene, Carbon Nanotubes, and Nanostructures: Techniques and
Applications, James E. Morris, Krzysztof Iniewski, CRC Press.
2013 Reference Books :
1. Carbon Nanotubes and Related Structures: Synthesis, Characterization and Applications, Edited by Dirk M. Guldi, Nazario Martín, Wiley-VCH Verlag.
2010 2. 2D Materials: Properties and Devices 1st Edition, Kindle Edition
by Phaedon Avouris (Editor), Tony F. Heinz (Editor), Tony Low (Editor)
2017 Course Outcomes: Upon successful completion of this course, students would be able to:
CO1: Awareness about the use of graphene for circuits.
CO2: Develop logic and photonic applications of molybdenum disulfide (MoS2)
CO3: Conceptualize the uses of novel 2D materials including silicene, germanene, stanene, and phosphorene
CO4: Design 2D materials for both field-effect transistors (FETs) and logic circuits
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
135 CO5: Perform simulation of structural, electronic, and transport properties from first principles.
EC400155 Clean Room Technology and Maintenance L-T-P: 3-0-0; Cr: 03 Pre-requisite: Basic VLSI Circuits
Objectives: The course will provide understanding of the cleanroom standards and ancillary clean rooms.
S.
No.
Contents Contact
Hours 1. Introduction, Cleanroom Classification Standards, Unidirectional air flow
cleanroom, Basis of Clean room standards, Federal Standards 209 ,ISO standard 14644-1:1999,Cleanroom classification(Pharmaceutical, cleanrooms)
2. Design of Turbulently Ventilated and Ancillary Cleanrooms, Mini environments, isolators and RABS, Containment zone, Construction and clean build, Design of Unidirectional Cleanrooms.
3. High Efficiency Air filtration, Particle removal mechanisms, testing of high efficiency filters.
4. Cleanroom Testing and Monitoring, Principles of cleanroom testing, Testing in relation to room type and occupation state, Monitoring of cleanroom.
5. Measurement of Air Quantities and Pressure Differences, Air movement control, Recovery test methods, Cleanroom containment leak testing.
6. Filter Installation leak testing, Operating a clean room, Materials, equipment and machinery, Clothing, masks and gloves, cleaning a cleanroom.
Total Contact Hours 42
Reading:
1. William White, Cleanroom Technology: Fundamentals of Design, Testing and Operation, 2nd Edition, Wiley, 2010.
2010 2. Matts Ramstorp, Introduction to Contamination Control and Cleanroom
Technology, Wiley, 2008.
2008
3. Wani-Kai Chen (editor), The VLSI Hand book, CRI/IEEE press, 2000. 2000 Course Outcomes: Upon successful completion of the course, the students will be able to:
CO1: Identify the various design limits material used for clean room fabrication.
CO2: Describe the Performance of technology scaling and its implications.
CO3: Understand the complexities involved in the integrated circuits.
CO4: Identify and analyze the various steps for the fabrication of various components CO5: Assess the various reliability issues in VLSI technology
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
136
EC400156 VLSI Physical Design L-T-P: 3-0-0; Cr: 03
Pre-requisite: Analysis and Design of Digital Integrated Circuits
Objectives: To develop understanding of state-of-the-art tools and algorithms, which address design tasks such as floor planning, module placement and signal routing for VLSI logic and physical level design.
Sl.
No.
Contents Contact
Hours 1. Introduction: Layout and design rules, materials for VLSI fabrication, basic
algorithmic concepts for physical design, physical design processes and complexities.
2 2. Partition: Kernigham-Lin’s algorithm, Fiduccia Mattheyes algorithm,
Krishnamurty extension, hMETIS algorithm, multilevel partition techniques.
6 3. Floor-Planning: Hierarchical design, wirelength estimation, slicing and non-
slicing floorplan, polar graph representation, operator concept, Stockmeyer algorithm for floorplanning, mixed integer linear program.
10 4. Placement: Design types: ASICs, SoC, microprocessor RLM; Placement
techniques: Simulated annealing, partition-based, analytical, and Hall’s quadratic; Timing and congestion considerations.
8 5. Routing: Detailed, global and specialized routing, channel ordering, channel
routing problems and constraint graphs, routing algorithms, Yoshimura and Kuh’s method, zone scanning and net merging, boundary terminal problem, minimum density spanning forest problem, topological routing, cluster graph representation.
12
6. Sequential Logic Optimization and Cell Binding: State based optimization, state minimization, algorithms; Library binding and its algorithms, concurrent binding
4
Total 42
Suggested Books:
Text Books :
1. Sarrafzadeh, M. and Wong, C.K., “An Introduction to VLSI Physical Design”, 4th Ed., McGraw-Hill.
1996 2. Wolf, W., “Modern VLSI Design System on Silicon”, 2nd Ed., Pearson
Education.
2000 Reference Books :
3. Sait, S.M. and Youssef, H., “VLSI Physical Design Automation: Theory and Practice”, World Scientific.
1999 4. Dreschler, R., “Evolutionary Algorithms for VLSI CAD”, 3rd Ed.,
Springer
2002 5. Sherwani, N.A., “Algorithm for VLSI Physical Design Automation”, 2nd
Ed., Kluwer.
1999 6. Lim, S.K., “Practical Problems in VLSI Physical Design Automation”,
Springer.
2008
Course Outcomes: Upon successful completion of the course, the students will be able to:
CO1: Demonstrate VLSI tool-flow and appreciate FPGA architecture
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
137 CO2: Analyze the basics of system on chip and on chip communication architectures.
CO3: Understand the issues involved in ASIC design, including technology choice, design management, tool-flow.
CO4: Use software based experiments to demonstrate various aspects of different digital systems.
CO5: Recognize the necessity of life-long learning through timely exposure to the evolving and new technologies in the field of ASICs, SoC, microprocessor.
EC400157 DSP in VLSI L-T-P: 3-0-0; Cr: 03
Pre-requisite: MOS Device Physics and Modelling.
Objectives: To provide knowledge on transformations for high speed VLSI digital signal processing using pipelining, retiming, parallel processing, DSP hardware techniques FPGA based signal processing design and case study of a complete design of DSP processor.
Sl.
No.
Contents Contact
Hours 1. UNIT-1
Introduction to DSP Systems: Typical DSP programs, Area-speed-power tradeoffs, Representation methods of DSP systems Iteration, Iteration period, Iteration bound, Algorithms to compute iteration bound – Longest path matrix, Minimum cycle matrix, parallel processing, Pipelining of FIR digital filters, Parallel processing, Pipelining and parallel processing for low power, Retiming formulation, Retiming, unfolding, Properties of unfolding,
Application of unfolding.
10
2. UNIT-2
Fast Convolution: Introduction, Cook-Toom algorithm and modified Cook- Toom algorithm, Winograd algorithm and modified Winograd algorithm, Iterated convolution, Cyclic convolution, Design of Fast convolution algorithm by inspection.
6
3. UNIT-3
Algorithmic Strength Reduction in Filters and Transforms: Introduction, Parallel FIR filters, Two-parallel and three-parallel low-complexity FIR filters, 3-parallel fast FIR filter, Parallel filter algorithms from linear convolutions, Discrete Cosine Transform and Inverse DCT.
6
4. UNIT-4
Pipelined and Parallel Recursive and Adaptive Filters: Introduction, Pipeline in 1st order IIR digital filters, Pipelining in higher order IIR digital filters, Parallel processing for IIR filters, Combined pipeline and parallel processing for IIR filters.
4
5 UNIT-5
Programmable DSP Hardware: Processing Architectures (von Neumann, Harvard), DSP core algorithms (FIR, IIR, Convolution, Correlation, FFT), IEEE standard for Fixed- and Floating -P oint Computations, Special Architectures Modules used in Digital Signal Processors (like MAC unit, Barrel shifters), On-Chip peripherals, DSP benchmarking.
6
Department of Electronics and Communication Engineering National Institute of Technology, Patna.
138 6 UNIT-6
Application of DSP & Multi rate DSP, Application to machine learning, introduction to wavelets, application to image processing, design of phase shifters, DSP in speech processing & other applications
6
7 UNIT-7
FPGA based DSP Systems: FPGA based signal processing design-case study of a complete design of DSP processor.
4
Total 42
Suggested Books:
Reference Books:
1. M. Sasikumar, D. Shikhare, Ravi Prakash, “Introduction to Parallel Processing”, 1st Edition, PHI.
2006.
2. Fayez Gebali, “Algorithms and Parallel Computing”,1st Edition, John Wiley & Sons
2011 3. Rohit Chandra, Ramesh Menon, Leo Dagum, David Kohr, DrorMaydan,
Jeff McDonald ,“Parallel Programming in Open MP”, 1st Edition, Morgan Kaufman
2000 4 Ann Melnichuk, Long Talk, “Multicore Embedded systems”, 1st
Edition, CRC Press.
2010 5. Wayne Wolf, “High Performance Embedded Computing: Architectures,
Applications and Methodologies”, 1st Edition, Morgan Kaufman
2006
Course Outcomes: At the end of this course, students will be able to:
CO1: Understand the basic design of filters and their algorithms and study the challenges in the area of DSP.
CO2: Design the Fast convolution algorithm by inspection and solve numerical problems CO3: Evaluate the performance of Pipelined, Parallel Recursive and Adaptive Filters
CO4: Analyze the performance of FPGA based signal processing design and study DSP processor.
CO5: Understand the concept of programmable DSP hardware for machine learning, wavelets, application, image processing, speech processing applications and other applications.
Text Books :
1. Parhi, Keshab K., “VLSI Digital Signal Processing Systems: Design and
Implementation”, John Willey & Sons. 1999
2. John G. Proakis, Dimitris Manolakis: Digital Signal Processing:
Principles, Algorithms and Applications, 4th ed, Pearson.
2006 3. Sen M. Kuo, Woon-Seng Gan: Digital Signal Processors: Architectures,
Implementations, and Applications, Prentice Hall.
2005 4. E.S.Gopi, “Algorithmic Collections for Digital Signal Processing
Applications Using MATLAB”, 1st Edition, Springer Netherlands, 2007.
2007