Concepts
Prof. R K Joshi
CSE, IIT Bombay
Source Program
a=1;
b=2;
a=a+b;
cout << a;
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2 add R1 and R2, result in R1
move R1 to address M1 move M1 to DisplayBuffer R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2 add R1 and R2, result in R1
move R1 to address M1 move M1 to DisplayBuffer R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $2 to address M2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $2 to address M2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move M1 to register R1
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move M1 to register R1
1
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move M2 to register R2
1 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move M2 to register R2
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
1 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
add R1 and R2, result in R1
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
add R1 and R2, result in R1
3 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 11
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move R1 to address M1
3 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 33
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
move R1 to address M1
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
3 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 33
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffe
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
move M1 to DisplayBuffer
3 2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
R2 33
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
move M1 to DisplayBuffer
3
2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer 2 R2
move $1 to address M1 move $2 to address M2 move M1 to register R1 move M2 to register R2
add R1 and R2, result in R1 move R1 to address M1 move M1 to DisplayBuffer
3 how to terminate???