Analysis, design and control of DC-DC converters for general lighting systems

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ANALYSIS, DESIGN AND CONTROL OF DC-DC CONVERTERS FOR GENERAL LIGHTING SYSTEMS

SOMNATH PAL

DEPARTMENT OF ELECTRICAL ENGINEERING INDIAN INSTITUTE OF TECHNOLOGY DELHI

DECEMBER 2020

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© Indian Institute of Technology Delhi (IITD), New Delhi, 2020

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ANALYSIS, DESIGN AND CONTROL OF DC-DC CONVERTERS FOR GENERAL LIGHTING SYSTEMS

by

SOMNATH PAL

Department of Electrical Engineering

Submitted

in fulfillment of the requirements of the degree of DOCTOR OF PHILOSOPHY

to the

INDIAN INSTITUTE OF TECHNOLOGY DELHI

DECEMBER 2020

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CERTIFICATE

This is certified that the thesis entitled, “Analysis, Design and Control of DC-DC Converters for General Lighting Systems,” being submitted by Mr. Somnath Pal for the award of the degree of Doctor of Philosophy is a record of the bonafide research work carried out by him in the Department of Electrical Engineering of Indian Institute of Technology Delhi.

Mr. Somnath Pal has fulfilled the requirements of this thesis work under my guidance and supervision, which to my knowledge has reached the requisite standard. The matters embodied in this thesis, have not been submitted to any other University or Institute for the award of any degree.

Dated: (Prof. Bhim Singh)

Electrical Engineering Department

Indian Institute of Technology Delhi

Hauz Khas, New Delhi-110016, India

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ACKNOWLEDGEMENTS

I would like to express my sincere gratitude and indebtedness to Prof. Bhim Singh for providing me an opportunity to carry out the Ph.D. work under his supervision. Working under him has been a wonderful experience, which has provided me with a deep insight into the world of research. From time to time, he encouraged me to excel in my work and it is his quest for excellence that has inspired me to improve my work and constantly introspect myself. His valuable suggestions, constant encouragement, and continuous monitoring have propelled me to complete the research with quality. I would like to thank him very much for his support and inspiration during my study and research.

My sincere thanks and deep gratitude are to my SRC members Prof. S. Mishra, Prof. N.

Senroy, and Dr. A. Verma, for their encouragement, insightful comments, and hard questions that helped me a lot in my progress and presentations.

I take this opportunity to sincerely acknowledge the Indian Institute of Technology Delhi for providing excellent research facilities. Thanks are due to Mr. Gurucharan Singh, Mr.

Negi, Mr. Srichand, and Mr. Puran Singh, laboratory staff of Power Electronics and PG Machines for their sustained help, exemplary attitude, and dedication to carry out my dissertation work.

I express my warm thanks to all of my friends and well-wishers Prof. Ashish Srivastava, Mr. Anshul Varshney, Dr. Nishant Kumar, and Dr. Aniket Anand. My thanks are also due to Mr. Praveen K Singh, Mr. Bodhibrata Mukhopadhyay, and Ms. Dedeepya Pappireddy who have given me immense moral support and co-operation to perform my work comfortably.

I must thank my colleagues at Philips India Limited (presently Signify Innovations India Limited), Noida during my tenure in this esteemed organization. My deepest sense of

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gratitude to Mr. Amit Jain, Director Philips India Ltd. for his precious guidance that keeps me on the correct path and allowing me to carry out my research work. I would also like to express my special thanks to Mr. Shyam Singh for taking part in useful decisions and arranged all facilities to make life easier. I choose this moment to acknowledge his contribution much gratefully.

Words cannot express the feelings and gratitude I have for my parents for the constant unconditional encouragement, support, and personal sacrifices they made to push me forward to reach new levels of excellence. Finally, I thank my wife, Ms. Moumita Pal, for her inspiration, love that endorsed me to complete my research work. Her faith and belief in my capabilities have always encouraged me to achieve higher academic credentials. This dissertation stands as a testament to her unconditional adore and encouragement. Once again, I bow to all those who directly or indirectly helped me but their names are left out.

Date: 30 Dec. 2020 Somnath Pal

Place: New Delhi 2014EEZ8316

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ABSTRACT

Lighting (or illumination) characterizes the way an area is known to the human eye through either natural or artificial light. Natural light emanates predominantly from the sun.

The intensity of sunlight varies in accordance with the time of day and the location. Buildings and premises are often designed to improve the capture of natural daylight. Alternatively, artificial light is human-made and can emerge from sources including fire, gaslight, candlelight, electric lamps, and so forth. At present, however, the term 'artificial lighting' essentially refers to lighting that comes from electric lamps. Artificial light as a rule is simply manipulated to achieve the required lighting result. The light can be enhanced or reduced, directed, focused, and colored. This enables lighting to produce a range of effects conferring to the requirements of a space. The term ‘general lighting’ relates to the background levels of light in a specific area. In the majority of workplaces, the optimal level of general lighting is determined in accordance with the best practices to ensure human safety and empower everyday visual tasks to be carried out comfortably and efficiently. General lighting may be foreseen merely by artificial lighting or a combination of artificial and natural light. The type of artificial light source adapted is to be determined by the type of space such as indoor or outdoor, and the lighting levels along with the quality and the energy consumption of the lighting luminaire. In recent years, it has been noticed an immense shift away from traditional incandescent filament light bulbs to more energy-savings alternatives. The exploration of new light sources such as the light-emitting diode (LED) has been made revolutionary changes in lighting design. Owing to its exclusive advantages, LED is replacing conventional light sources at a more rapid pace. When combined with advanced control gear, a clean, energy- efficient, and cost-effective lighting solution can be made for general lighting arrangements.

The LED driving technologies are primarily classified based on the required power demand. These are further classified on the basis of isolated or non-isolated outputs from the input AC mains. The conventional LED driving system comprises of DC-DC converters, which involves inferior control mechanism and excess component count that gives rise to unsatisfactory performances concerning power quality consideration and efficiency. In addition to this, the majority of converters are designed to operate within a short range of universal AC mains. The converter stability is quite unexplored and does not fulfill the constant voltage or constant current operation of the LED load. A large ripple in the LED drive current is often witnessed, which leads to unwanted flicker in the light produced.

Moreover, due to increasing uses of artificial light sources, lighting also accountable for

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significant energy consumption over the past few years. As a consequence, several studies are conducted on energy-saving lighting solutions, which are reported in the literature.

In this research work, the analysis, design, control, and development of several DC-DC converters are carried out with the view of improving the aforementioned drawbacks. The DC-DC converters, which are explored as LED drivers are aimed at four fundamental aspects, namely the power quality improvement over a wide operational range, increasing converter efficiency, development of cost-effective dimming concepts, and reducing design complexity with improved stability. The research work is also focused on various lighting demands starting from very low power for household applications to high power industrial uses. In each stage, appropriate DC-DC converters are studied and developed in line with the foregoing aspects that give rise to satisfactory performances over the conventional topologies used in LED lighting systems. The trouble with poor efficiency in isolated converters, is further improved and eradicated the limitations of low power applications for single-stage converters. This research work has also explored the conventional single-stage DC-DC converters in high power lighting demands by shifting the operating trends from discontinuous conduction mode (DCM) to critical conduction mode (CrCM). Taking advantage of CrCM operation and proper controller design, improved power quality performances, and efficiency are achieved in the proposed DC-DC converters. Moreover, in high power LED loads, the need for improved power quality parameters and efficiency are more important along with the precise regulations. In order to satisfy the above criteria, two- stage converter solutions are implemented where the first-stage is responsible for the power factor correction (PFC) over universal AC mains, and the second-stage precisely controls the load regulation with isolation. In terms of converter stability during transient and dynamic operations, a comprehensive study of stability performances using the state-space analysis model for all the DC-DC converters, is carried out and implemented in hardware prototypes.

This research work also investigates on low-cost energy-savings dimming concepts, which are integrated into the DC-DC converters and completely retrofitted. The primary drawback of excessive harmonic contents in AC mains current during dimming operations in the conventional low-cost dimming practices, is addressed and improved power quality performances are made available through the proposed dimming concepts. Furthermore, all the converter topologies and dimming models are presented in this research work, are using minimal circuit components, reliable in operation, and applicable for upcoming LED lighting solutions.

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साराांश

प्रकाश व्यवस्था (या रोशनी) उस तरह की ववशेषता है जैसे वक वकसी क्षेत्र को प्राकृवतक या कृवत्रम प्रकाश के माध्यम से

मानव आंखों के विए जाना जाता है। प्राकृवतक प्रकाश मुख्य रूप से सूयय से वनकिता है। सूयय के प्रकाश की तीव्रता विन के

समय और स्थान के अनुसार बििती रहती है। इमारतें और पररसर अक्सर प्राकृवतक विन के उजािे को प्राप्त करने के विए विजाइन वकए जाते हैं। वैकवपपक रूप से, कृवत्रम प्रकाश मानव वनवमयत है और आग, गैसिाइट, मोमबत्ती की रोशनी, वबजिी

के िैंप, और अन्य स्रोतों से उभर सकता है। वतयमान में, हािांवक, 'कृवत्रम प्रकाश व्यवस्था' शब्ि अवनवायय रूप से प्रकाश व्यवस्था को संिवभयत करता है जो वबजिी के िैंप से आता है। एक वनयम के रूप में कृवत्रम प्रकाश को आवश्यक प्रकाश पररणाम प्राप्त करने के विए बस सफाई से उपयोग वकया जाता है। प्रकाश को बढाया या कम वकया जा सकता है, वनिेवशत वकया जा सकता है, केंवित वकया जा सकता है, और रंगीन बनाया जा सकता है। यह प्रकाश को जगह की आवश्यकताओं के

अनुरूप प्रभाव की एक श्ृंखिा का उत्पािन करने में सक्षम बनाता है। 'सामान्य सामान्य प्रकाश व्यवस्था' शब्ि एक वववशष्ट क्षेत्र में प्रकाश की पृष्ठभूवम के स्तर से संबंवित है। अविकांश काययस्थिों में, सामान्य प्रकाश व्यवस्था का इष्टतम स्तर मानव सुरक्षा सुवनवित करने और रोजमराय के दृश्य कायों को आराम से और कुशिता से संपन्न करने के विए सवोत्तम प्रथाओं के

अनुसार वनिायररत वकया जाता है। सामान्य प्रकाश व्यवस्था केवि कृवत्रम प्रकाश व्यवस्था या कृवत्रम और प्राकृवतक प्रकाश के

संयोजन से ही हो सकती है। अनुकूवित वकए गए कृवत्रम प्रकाश स्रोत को जगह के प्रकार जैसे वक घर के अंिर या बाहर, और प्रकाश स्तर के साथ-साथ गुणवत्ता और प्रकाश िुवमनेर की ऊजाय खपत द्वारा वनिायररत वकया जाता है। हाि के वषों में, यह

िेखा गया है वक पारंपररक तापिीप्त प्रकाश बपबों की जगह ऊजाय-बचत वबकपप एक बड़ा बििाव है। प्रकाश उत्सजयक िायोि

(एिईिी) जैसे नए प्रकाश स्रोतों की खोज में प्रकाश व्यवस्था के विजाइन में क्ांवतकारी बििाव वकए गए हैं। अपने ववशेष

िाभों के कारण, एिईिी पारंपररक प्रकाश स्रोतों को अविक तीव्र गवत से बिि रहा है। उन्नत वनयंत्रण वगयर के साथ संयुक्त होने पर, सामान्य प्रकाश व्यवस्था के विए एक स्वच्छ, ऊजाय-कुशि और िागत प्रभावी प्रकाश समािान वकया जा सकता

है।

एिईिी ड्राइववंग प्रौद्योवगवकयों को मुख्य रूप से आवश्यक वबजिी की मांग के आिार पर वगीकृत वकया जाता है। इन्हें

इनपुट एसी मेन से पृथक या गैर-पृथक आउटपुट के आिार पर आगे वगीकृत वकया गया है। पारंपररक एिईिी ड्राइववंग वसस्टम में िीसी-िीसी कन्वटयसय शावमि हैं, वजसमें अवर वनयंत्रण तंत्र और अवतररक्त घटक गणना शावमि है जो वबजिी की

गुणवत्ता पर ववचार और िक्षता से संबंवित असंतोषजनक प्रिशयनों को जन्म िेती है। इसके अवतररक्त, अविकांश कन्वटयसय को

यूवनवसयि एसी मेन की एक छोटी सीमा के भीतर संचावित करने के विए विजाइन वकया गया है। कनवटयर वस्थरता काफी

अस्पष्ट है और एिईिी िोि के वनरंतर वोपटेज या वनरंतर करंट संचािन को पूरा नहीं करता है। एिईिी ड्राइव करंट में एक

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बड़ी ररप्पि अक्सर िेखी जाती है, वजससे उत्पावित प्रकाश में अवांवछत वििवमिाहट होती है। इसके अिावा, कृवत्रम प्रकाश स्रोतों के बढते उपयोग के कारण, वपछिे कुछ वषों में महत्वपूणय ऊजाय खपत के विए प्रकाश व्यवस्था भी वजम्मेिार है।

पररणामस्वरूप, ऊजाय-बचत प्रकाश समािानों पर कई अध्ययन वकए जाते हैं, जो सावहत्य में ररपोटय वकए गए हैं।

इस शोि कायय में, कई िीसी-िीसी कन्वटयसय के ववश्लेषण, विजाइन, वनयंत्रण और ववकास को उपरोक्त कवमयों को

सुिारने के दृवष्टकोण से वकया गया है। िीसी-िीसी कन्वटयसय, वजन्हें एिईिी ड्राइवरों के रूप में खोजा गया है, का उद्देश्य चार मूिभूत पहिुओं , अथायत् एक व्यापक पररचािन सीमा पर वबजिी की गुणवत्ता में सुिार, कनवटयर िक्षता में वृवि, िागत प्रभावी विवमंग अविारणाओं का ववकास और बेहतर वस्थरता के साथ विजाइन जवटिता को कम करना है। अनुसंिान कायय वववभन्न प्रकाश मांगों पर भी ध्यान केंवित वकया गया है जो घरेिू अनुप्रयोगों के विए उच्च शवक्त औद्योवगक उपयोगों के विए बहुत कम वबजिी से शुरू होता है। प्रत्येक चरण में, उपयुक्त िीसी-िीसी कन्वटयसय का अध्ययन वकया गया है और पूवयगामी

पहिुओं के अनुरूप ववकवसत वकया गया है जो एिईिी प्रकाश व्यवस्था में उपयोग वकए जाने वािे पारंपररक टोपोिॉजी पर संतोषजनक प्रिशयन को जन्म िेता है। आइसोिेटेि कन्वटयसय में खराब िक्षता के साथ परेशानी, एकि चरण के कन्वटयसय के विए कम वबजिी अनुप्रयोगों की सीमाओं को और बेहतर बनाया गया है। इस शोि कायय में पारंपररक वसंगि-स्टेज िीसी-िीसी

कन्वटयसय को हाई पावर िाइवटंग विमांि्स में विस्कन्टीन्यूस कंिक्शन मोि को वक्वटकि कंिक्शन मोि में पररबवतयत करके

उपयोग वकया गया है। प्रस्ताववत िीसी-िीसी कन्वटयसय में सीआरसीएम संचािन और उवचत वनयंत्रक विजाइन का िाभ उठाते

हुए, बेहतर वबजिी की गुणवत्ता और िक्षता को प्राप्त वकया गया है। इसके अिावा, उच्च शवक्त वािे एिईिी िोि में, सटीक वनयमों के साथ-साथ बेहतर वबजिी गुणवत्ता मापिंिों और िक्षता की आवश्यकता अविक महत्वपूणय है। उपरोक्त मानिंिों को

पूरा करने के विए, िो-चरण कनवटयर समािान कायायवन्वत वकए जाते हैं, जहां पहिा चरण यूवनवसयि एसी मेन पर पावर फैक्टर करेक्शन (पीएफसी) के विए वजम्मेिार होता है, और िूसरा चरण अिगाव के साथ िोि वववनयमन को वनयंवत्रत करता है।

क्षवणक और गवतशीि संचािन के िौरान कनवटयर वस्थरता के संिभय में, सभी िीसी-िीसी कन्वटयसय के विए स्टेट-स्पेस ववश्लेषण मॉिि का उपयोग करके वस्थरता प्रिशयन का एक व्यापक अध्ययन वकया गया है और हाियवेयर प्रोटोटाइप में

कायायवन्वत वकया गया है।

यह शोि कायय कम-िागत वािी ऊजाय-बचत विवमंग अविारणाओं पर भी जांच करता है, वजन्हें िीसी-िीसी कन्वटयसय

में एकीकृत वकया गया है और पूरी तरह से रेट्रोवफट वकया गया है। पारंपररक कम िागत वािी विवमंग प्रथाओं में मविम

संचािन के िौरान एसी मेन करंट में अत्यविक हामोवनक कंटेंट की प्राथवमक खामी को संबोवित वकया गया है और प्रस्ताववत

विवमंग अविारणाओं के माध्यम से बेहतर गुणवत्ता वािे प्रिशयन उपिब्ि कराए गए हैं। इसके अिावा, सभी कनवटयर

टोपोिॉजी और विवमंग मॉिि इस शोि कायय में प्रस्तुत वकए गए हैं, जो न्यूनतम सवकयट घटकों का उपयोग कर रहे हैं,

संचािन में ववश्वसनीय हैं, और आगामी एिईिी िाइवटंग समािानों के विए िागू हैं।

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DEVELOPMENT

OF A WIDE-INPUT-EXTREME- OUTPUT (WIEO) TAPPED-INDUCTOR BUCK- BOOST CONVERTER FOR EFFICIENCY IMPROVEMENT IN LED LIGHTING ARRANGEMENTS

69-96

4.1 General 69

4.2 Configurations of Diode-Tapped and Switch-Tapped Versions of Buck- Boost Converter

70 4.3 Design of Diode-Tapped and Switch-Tapped Buck-Boost Converters in

CrCM

71

4.3.1 Design of Critical Inductances 74

4.3.2 Design of DC-link Capacitors 74

4.4 Small-Signal State-Space Modeling of Tapped-Inductor Buck-Boost Converters

75 4.4.1 Stability Analysis of Diode-Tapped Buck-Boost Converter 76 4.4.2 Stability Analysis of Switch-Tapped Buck-Boost Converter 80

4.5.1 PFC Performances and Load Regulations over Universal AC Mains

85

4.5.2 Validation of CrCM Operation 89

4.5.3 Switching Stress Analysis and Improvement of Converter Efficiency

90

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4.5.4 Dimming Performances 92

4.5.5 Experimental Electrical Parameters 93

4.6 Conclusions 95

CHAPTER V DESIGN, SIMULATION, AND IMPLEMENTATION OF A UNIVERSAL INPUT PFC CSC (CANONICAL SWITCHING CELL) CONVERTER IN LOW POWER LED LIGHTING SYSTEMS

97-116

5.1 General 97

5.2 Configuration and Working Principle of Non-Isolated CSC Converter in DICM

98 5.3 Design Procedure of CSC Converter over Universal AC Mains 101

5.3.1 Design of Input Inductor 101

5.3.2 Design of Intermediate Capacitor 102

5.3.3 Design of DC-link Capacitor 102

5.3.4 Design of Filter Capacitor 103

5.4 Control of DICM CSC Converter 104

5.5.1 Simulated Performance of PFC CSC Converter 105 5.5.2 Experimental Validation of CSC Converter as a Constant Current

LED Driver

108 5.5.2.1 Validation of CSC Converter as a PFC 108 5.5.2.2 Validation of Constant Current Operation 110 5.5.2.3 Validation of DICM Operation and Efficiency

Improvement

111 5.5.2.4 Experimental Electrical Performance Parameters for

Full Load and Half Load Conditions

113

5.6 Conclusions 115

CHAPTER VI ANALYSIS, DESIGN, MODELING, AND DEVELOPMENT OF A CRCM FLYBACK CONVERTER IN HIGH POWER LED LIGHTING APPLICATIONS

117-140

6.1 General 117

6.2 Working Principle of Flyback Converter in CrCM 118

6.3 Design of PFC Flyback Converter under Universal AC Mains Operation 120

6.3.1 Design of Primary Inductance 123

6.3.2 Design of Turns Ratio of Transformer 124

6.3.3 Design of Output DC-Link Capacitor 124

6.3.4 Selection of Semiconductor Components 124

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6.3.5 Design of Snubber Elements 125

6.4 Study of Stability Performances using State-Space Analysis 126 6.4.1 Stability Analysis under Open-Loop Condition 126 6.4.2 Stability Analysis under Closed-Loop Condition 128

6.5 Wide-Output Operation using External VCC Supply 130

6.6.1 Validation of PFC Performances 132

6.6.2 Validation of Constant Voltage Operation and Stability Performances

134 6.6.3 Ripple Reduction using 2^nd Stage LC Filter 135 6.6.4 CrCM Operation and Stresses on Semiconductor Components 136 6.6.5 Experimental Electrical Parameters and Power Loss Analysis 138

6.7 Conclusions 139

CHAPTER VII ANALYSIS, DESIGN, MODELING, AND DEVELOPMENT OF AN ISOLATED SINGLE-ENDED PRIMARY INDUCTANCE CONVERTER BASED LED DRIVER WITH DISTORTIONLESS DIMMING ARRANGEMENTS

141-165

7.1 General 141

7.2 Working Principle of Isolated SEPIC Converter in CrCM 142

7.3 Design Consideration under Universal AC Mains 145

7.3.1 Design of Critical Inductances 146

7.3.2 Design of AC Coupling Capacitor 146

7.3.3 Design of Output DC-link Capacitor 147

7.3.4 Design of Line Filter Capacitor 147

7.4 Stability Analysis of CrCM SEPIC in Isolated Configuration 148

7.4.1 Stability Analysis in Open-Loop Control 148

7.4.2 Stability Analysis in Closed-Loop Control 151 7.5 Operating Principle of Distortionless Dimming Concept Integrated into

Isolated SEPIC Control Gear

152

7.6.1 Experimental Validation of Isolated SEPIC as a PFC with Nonlinear LED Load under Full Output Operation

158 7.6.2 Validation of Power Quality Performances in Dimming Operation 160

7.6.3 Validation of Converter Stability 161

7.6.4 Experimental Electrical Parameters and Efficiency Improvement 162

7.7 Conclusions 165

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CHAPTER VIII ANALYSIS, DESIGN, MODELING, AND DEVELOPMENT OF A TWO-STAGE ZETA PFC FED LLC RESONANT CONVERTER IN HIGH BRIGHTNESS LED LIGHTING DESIGN

166-192

8.1 General 166

8.2 Principle of Operation of First-Stage PFC Zeta Converter in CrCM 167 8.3 Working Principle of Second-Stage LLC Resonant Converter 169

8.4 Design of PFC Zeta Converter in CrCM 172

8.4.1 Specifications of Input and Output Parameters of PFC Stage 172

8.4.2 Design of Input and Output Inductances 173

8.4.3 Design of Energy Transfer Capacitor 174

8.4.4 Design of DC-bus Capacitor 174

8.5 Design of Second-Stage LLC Resonant converter 174

8.5.1 Specifications of Input and Output Parameters of LLC Resonant Stage

175 8.5.2 Gain Characteristics of LLC Resonant Cell 175

8.5.3 Design of Transformer Turns Ratio 177

8.5.4 Design of Equivalent Load Resistance 177

8.5.5 Design of Voltage Gain 177

8.5.6 Design of Resonant Circuit Parameters 177

8.6 Stability Analysis for Constant DC-bus Operation using SSA 178

8.6.1 Stability under Open-Loop Condition 181

8.6.2 Stability Improvement under Closed-Loop Condition 182

8.7.2 Validation of Constant DC-Bus Operation and Bus Voltage Stability

187

8.7.3 Validation of Constant Current Operation 188

8.7.4 Validation of ZVS Operation and Efficiency Improvement 189

8.7.5 Experimental Electrical Parameters 190

8.8 Conclusions 191

CHAPTER IX ANALYSIS, DESIGN, MODELING, AND DEVELOPMENT OF A UNIVERSAL INPUT BOOST PFC FED LLC RESONANT CONVERTER IN HIGH POWER LED LIGHTING SYSTEMS

193-216

9.1 General 193

9.2 Configuration of PFC Boost Converter Fed LLC Resonant Converter 194

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9.3 Design of CrCM Boost Converter 195

9.3.1 Design of Input Filter Capacitor 195

9.3.2 Design of DC-Bus Capacitor 196

9.3.3 Design of Boost Converter Inductor 196

9.4 Design of Second-Stage LLC Resonant Cell 197

9.4.1 Design of Turns Ratio and Reflected Load Resistance 197

9.4.2 Design of Minimum and Maximum Gains 198

9.4.3 Design of LLC Resonant Cell 198

9.4.4 Design of Resonance and Switching Frequencies 200

9.5 CrCM Operation of PFC Boost Converter 200

9.6 Stability Analysis using SSA for Boost Converter 202

9.6.1 Stability under Open-Loop Control 204

9.6.2 Stability under Closed-Loop Control 205

9.7.2 Validation of CV Operation and Bus Voltage Stability 211 9.7.3 Validation of ZVS Operation and Converter Efficiency 212 9.7.4 Experimental Electrical Performances under Full Load and Half

load Operations

214

9.8 Conclusions 215

CHAPTER X MAIN

CONCLUSIONS

AND SUGGESTIONS FOR FURTHER WORK

217-224

10.1 General 217

10.2 Fundamental Contributions, Comparisons, and Limitations 218

10.3 Main Conclusions 219

10.4 Suggestions for Further Work 223

REFERENCES 225-247

APPENDICES 248-255

LIST OF PUBLICATIONS 256-256

BIO-DATA 257-257

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LIST OF FIGURES

Fig. 3.1 Non-isolated Luo converter in source grounded configuration.

Fig. 3.2 Operation of PFC Luo converter in CrCM. (a) Mode I, (b) Mode II, (c) Waveforms.

Fig. 3.3 Bode plots of Luo converter (a) Open-loop systems, (b) Closed-loop systems.

Fig. 3.4 Type-II Compensation network of Luo converter in a closed-loop system.

Fig. 3.5 Hardware prototype of proposed pilot-line dimming concept using a non- isolated Luo converter.

Fig. 3.6 Sinusoidal AC input current generation in a PFC Luo converter.

Fig. 3.7 Voltage across CP1, CP2 and A, B w.r.t. GND in the dimming circuit of Luo converter (Scale: Horizontal: 20 ms/div, Vertical: 200 V/div).

Fig. 3.8 Voltage across R2, R4 and C4 w.r.t. GND in the dimming circuit of Luo converter (Scale: Horizontal: 100 ms/div, Vertical: 10 V/div).

Fig. 3.9 Clamping of Vcs during dimming and sinusoidal AC mains current generation in a Luo converter.

Fig. 3.10 Waveforms of PFC Luo converter for source voltage vs(t), and source current is(t). Scale (Horizontal: 10ms/div, Vertical: vs(t): 200 V/div; is(t): 400 mA/div;

at AC mains voltage operation of 85 V.

Fig. 3.11 Waveforms of PFC Luo converter for source voltage vs(t), and source current is(t). Scale (Horizontal: 10ms/div, Vertical: vs(t): 200 V/div; is(t): 250 mA/div;

at AC mains voltage operation of 265 V.

Fig. 3.12 PF attained in hardware prototype of PFC Luo converter for Full load and 30%

Dimming Load over universal AC mains.

Fig. 3.13 THDi obtained from hardware prototype of PFC Luo converter for Full load and 30% Dimming Load over universal AC mains.

Fig. 3.14 Waveforms of output DC voltage Vdc, and output DC current Idc for Luo converter. Scale (Horizontal: 5 ms/div, Vertical: Vdc: 17 V/div Idc: 200 mA/div) for the AC mains voltage of 85 V.

Fig. 3.15 Waveforms of output DC voltage Vdc, and output DC current Idc. for Luo converter. Scale (Horizontal: 5 ms/div, Vertical: Vdc: 17 V/div Idc: 200 mA/div) for the AC mains voltage of 265 V.

Fig. 3.16 Waveforms of Luo converter for drain-source voltage VDS(S1) and drain current ID(S1) of switching MOSFET, S1. Scale (Horizontal: 10 µs/div, Vertical: VDS(S1): 200 V/div; ID(S1): 300 mA/div for nominal AC mains voltage of 230 V.

Fig. 3.17 Voltage and current waveforms of Luo converter for switching diode D1. Scale (Horizontal: 10 µs/div, Vertical: Vd(D1): 100 V/div; Id(D1): 700 mA/div for nominal AC mains voltage of 230 V.

Fig. 3.18 Various circuit parameter waveforms of Luo converter before and after dimming. Scale (Horizontal: 20 ms/div, Vertical: vs(t): 240 V/div; is(t), Idc: 500 mA/div; Vdc: 50 V/div) for AC mains operation of 230 V.

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Fig. 3.19 Various circuit parameter waveforms of Luo converter before and after dimming. Scale (Horizontal: 20 ms/div, Vertical: vs(t): 240 V/div; is(t), Idc: 500 mA/div; Vdc: 50 V/div) for AC mains operation of 115 V.

Fig. 3.20 Various circuit parameter waveforms of Luo converter at 30% dimming condition. Scale (Horizontal: 20 ms/div, Vertical: vs(t): 240 V/div; is(t), Idc: 500 mA/div; Vdc: 50 V/div) for AC mains operation of 230 V.

Fig. 3.21 Efficiency vs. source voltage plot of Luo converter at full load and 30%

dimming load.

Fig. 3.22 Harmonic contents in AC mains current of PFC Luo converter at 265 V mains operation and associated limits as per IEC 61000-3-2.

Fig. 3.23 Photograph of the hardware prototype of non-isolated Luo converter based LED driver.

Fig. 4.1 Diode-tapped buck-boost converter in a step-down configuration.

Fig. 4.2 Switch-tapped buck-boost converter in a step-up configuration.

Fig. 4.3 Transfer characteristics of diode-tapped buck-boost converter.

Fig. 4.4 Transfer characteristics of switch-tapped buck-boost converter.

Fig. 4.5 Open-loop Bode Plot of diode-tapped buck-boost converter with a PM of 2.93°

and GM of infinity.

Fig. 4.6 Closed-loop Bode Plot of diode-tapped buck-boost converter with a GM of 37 dB and PM of 90°.

Fig. 4.7 Type-II compensation network for closed-loop control of the diode-tapped buck-boost converter.

Fig. 4.8 Open-loop Bode Plot of switch-tapped buck-boost converter with a PM of 3.41°

and GM of infinity.

Fig. 4.9 Closed-loop Bode Plot of switch-tapped buck-boost converter with PM of 90.2°

and GM of 25.2 dB.

Fig. 4.10 Type-II compensation network for closed-loop control of switch-tapped buck- boost converter.

Fig. 4.11 Schematic of hardware prototype for diode-tapped version of the buck-boost converter.

Fig. 4.12 Experimental waveforms of input voltage vs1(t), {scale:120 V/div}; input current is1(t), {scale:0.8 A/div} output DC voltage Vdc1, {scale:3.5 V/div} and output DC current Idc1, {scale:1.5 A/div} for 85 V AC mains of the diode-tapped step-down circuit. Time scale:10 ms/div.

Fig. 4.13 Experimental waveforms of input voltage vs1(t), {scale:120 V/div}; input current is1(t), {scale:0.5 A/div} output DC voltage Vdc1, {scale:3.5 V/div} and output DC current Idc1, {scale:1.5 A/div} for 265 V AC mains of the diode-tapped step- down circuit. Time scale:10 ms/div.

Fig. 4.14 Experimental waveforms of input voltage vs2(t), {scale:120 V/div}; input current is2(t), {scale:0.8 A/div} output DC voltage Vdc2, {scale:100 V/div} and output DC current Idc2, {scale:50 mA/div} for 85 V AC mains of the switch-tapped step-up circuit. Time scale:10 ms/div.

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Fig. 4.15 Experimental waveforms of input voltage vs2(t), {scale:120 V/div}; input current is2(t), {scale:0.5 A/div} output DC voltage Vdc2, {scale:100 V/div} and output DC current Idc2, {scale:50 mA/div} for 265 V AC mains of the switch-tapped step-up circuit. Time scale:10 ms/div.

Fig. 4.16 PF and THDi variations over universal AC mains for diode-tapped buck-boost converter.

Fig. 4.17 PF and THDi variations over universal AC mains for switch-tapped buck-boost converter.

Fig. 4.18 Harmonic spectrum of diode-tapped and switch-tapped versions at 265 V AC mains.

Fig. 4.19 Waveforms of currents through the inductors L1 for diode-tapped, {scale:1.5 A/div} and L2 for switch-tapped converters {scale:0.15A/div}; at 230 V AC mains. Time scale:5 µs/div.

Fig. 4.20 Waveforms of switch voltage (Yellow) and switch current (Red) for diode- tapped (S1), {scale:100V/div, 0.5A/div} and switch-tapped (S2), {scale:150V/div, 0.15A/div}; at 230V AC mains. Time scale:5µs/div.

Fig. 4.21 Efficiency comparison between diode-tapped and untapped versions of the buck-boost converter in step-down operation.

Fig. 4.22 Efficiency comparison between switch-tapped and untapped versions of the buck-boost converter in step-up operation.

Fig. 4.23 Thermal imaging analysis of the diode-tapped converter for loss distribution.

Fig. 4.24 PF and THDi performances during 30% dimming operation of diode-tapped circuit

Fig. 4.25 PF and THDi performances during 30% dimming operation of switch-tapped circuit.

Fig. 5.1 Configuration of non-isolated CSC converter with inverting LED load.

Fig. 5.2 Modes of operations of CSC converter in DICM and associated waveforms. (a) Mode I, (b) Mode II, (c) Waveforms.

Fig. 5.3 PFC Control of DICM CSC converter.

Fig. 5.4 Voltage and current waveforms of different circuit elements in CSC converter at 85 V AC mains operations.

Fig. 5.7 Simulated waveforms of AC mains current and harmonic spectrum in CSC converter. (a) 85 V AC mains operation, (b) 230 V AC mains operation, (c) 265 V AC mains operation.

Fig. 5.8 Photograph of hardware prototype for CSC converter based LED driver.

Fig. 5.9 Experimental waveforms of CSC converter for input current at 85 V AC mains operation (Scale, Vert: 100 V/div, 250 mA/div; Horizontal: 10 ms/div).

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Fig. 5.12 PF variation of PFC CSC converter over universal AC mains.

Fig. 5.13 THDi variation of PFC CSC converter over universal AC mains.

Fig. 5.14 Harmonic Spectrum of PFC CSC converter at 265 V AC mains operation.

Fig. 5.15 Voltage and current waveforms of CSC converter for the LED load at 85 V AC mains operation (Scale, Vert: 10 V/div, 210 mA/div; Horizontal: 10 ms/div).

Fig. 5.18 Experimental waveshape of CSC converter for the voltage across the intermediate capacitor at 265 V AC mains operation (Scale, Vertical: 140 V/div;

Horizontal: 10 ms/div).

Fig. 5.19 Experimental waveforms of switching stresses recorded at 85 V AC mains condition in CSC converter (Scale, Vertical: 50 V/div, 1 A/div; Horizontal: 10 ms/div, for zoomed waveshapes, Vertical: 65 V/div, 1 A/div; Horizontal: 5 µs/div).

Fig. 5.20 Efficiency variation of CSC converter over universal AC mains.

Fig. 6.1 Configuration of flyback converter with 2^nd stage LC filter and multi-string LED load.

Fig. 6.2 Working principle of flyback converter in CrCM operation. (a) Mode I, (b) Mode II, (c) Waveforms

Fig. 6.3 Waveforms of sinusoidal current generation over a half cycle in a PFC flyback converter.

Fig. 6.4 Open-loop Bode plot of flyback converter in CrCM operation.

Fig. 6.5 Closed-loop Bode plot of flyback converter in CrCM operation.

Fig. 6.6 Hardware prototype schematic of flyback converter consisting of 2^nd stage LC filter, and Type-II compensator blocks.

Fig. 6.7 Supply voltage vs(t) and supply current is(t) waveforms of flyback converter at AC mains operation of 85 V. Scale (Horizontal: 10 ms/div; Vertical: vs(t): 100 V/div; is(t): 500 mA/div.).

Fig. 6.8 Supply voltage vs(t) and supply current is(t) waveforms of flyback converter at AC mains operation of 265 V. Scale (Horizontal: 10 ms/div; Vertical: vs(t): 100 V/div; is(t): 320 mA/div.).

Fig. 6.9 PF variation of the CrCM flyback converter for full load and half load operations.

Fig. 6.10 THDi characteristics of PFC flyback converter over universal AC mains for full load and half load operations.

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Fig. 6.11 Harmonic spectrum of PFC flyback converter at 265 V AC mains operation for full load and half load conditions.

Fig. 6.12 Waveforms of output DC voltage Vdc and output DC current Idc of CrCM flyback converter at AC mains operation of 85 V. Scale (Horizontal: 10 ms/div;

Vertical: Vdc: 15 V/div; Idc: 550 mA/div).

Fig. 6.13 Waveforms of output DC voltage Vdc and output DC current Idc of CrCM flyback converter at AC mains operation of 265 V. Scale (Horizontal: 10 ms/div; Vertical: Vdc: 15 V/div; Idc: 550 mA/div).

Fig. 6.14 Waveform of output voltage stability during the transition of the input voltage from 85 V to 265 V in CrCM flyback converter. Scale (Horizontal: 50 ms/div.).

Fig. 6.15 Waveforms of output voltage ripple without 2^nd stage LC filter in flyback converter at AC supply voltage of 265 V. Scale (Horizontal: 10 ms/div;

Vertical: Vdc: 5 V/div.).

Fig. 6.16 Waveforms of output voltage ripple with 2^nd stage LC filter in flyback converter at AC supply voltage of 265 V. Scale (Horizontal: 10 ms/div; Vertical: Vdc: 5 V/div.).

Fig. 6.17 Primary inductor current of CrCM flyback converter at AC supply voltage of 85 V. Scale (Horizontal: Un-zoomed (5 ms/div), Zoomed (8.5 µs/div); Vertical: 1.5 A/div.).

Fig. 6.18 Waveforms of CrCM flyback converter for drain current and drain-source voltage of the switching MOSFET, S1 at AC supply voltage of 85 V. Scale (Horizontal: 6.5 µs/div; Vertical: VDS(S1): 60 V/div; ID(S1): 2 A/div.).

Fig. 6.19 Waveforms of CrCM flyback converter for drain current and drain-source voltage of the switching MOSFET, S1 at an AC supply voltage of 265 V. Scale (Horizontal: 7µs/div; Vertical: VDS(S1): 100 V/div; ID(S1): 1.5 A/div.).

Fig. 6.20 Waveforms of CrCM flyback converter captured for current and voltage stresses of switching diode D1 at AC mains voltage of 265 V. Scale (Horizontal: 6 µs/div; Vertical: Vd(D1): 250 V/div; Id(D1): 5 A/div.).

Fig. 6.21 Efficiency comparison of the proposed converter in CrCM and traditional flyback converter in DCM.

Fig. 7.1 Isolated SEPIC control gear with LED lighting load.

Fig. 7.2 Current through various circuit components of isolated SEPIC in CrCM operation. (a) Mode I, (b) Mode II (c) Waveforms.

Fig. 7.3 Operation of CrCM SEPIC with primary-side sensing.

Fig. 7.4 Open-loop Bode plot of CrCM SEPIC.

Fig. 7.5 Closed-loop Bode plot of CrCM SEPIC.

Fig. 7.6 Schematic of hardware prototype with different blocks responsible for the operation of SEPIC.

Fig. 7.7 Waveforms of isolated SEPIC for different circuit parameters before and after dimming (Scale: Vertical: 150 V/div for vs(t), 1.5 V/div for CK, Gates of M1 &

M2, and 250 mA/div for Idc. Horizontal: 500 ms/div.) (a) 50% dimming example (b) 10% dimming example.

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Fig. 7.8 Developed hardware prototype of isolated SEPIC.

Fig. 7.9 Experimental setup for development of isolated SEPIC with LED load.

Fig. 7.10 Waveforms of input AC mains voltage and mains current at 85 V AC mains operation in a PFC SEPIC. (Scale: Ver. 125 V/div.; 400 mA/div.; Hor. 10 ms/div.).

Fig. 7.11 Waveforms of input AC mains voltage and mains current at 265 V AC mains operation in a PFC SEPIC. (Scale: Ver. 125 V/div.; 250 mA/div.; Hor. 10 ms/div.).

Fig. 7.12 PF variations of PFC SEPIC under universal AC mains operations for full load and 50% dimming load.

Fig. 7.13 THDi variations of PFC DEPIC under universal AC mains operations for full load and 50% dimming load.

Fig. 7.14 Waveforms of input AC mains voltage and mains current in a PFC SEPIC at 265 V AC mains operation during 50% dimming operation. (Scale: Ver. 120 V/div.; 185 mA/div.; Hor. 10 ms/div.).

Fig. 7.15 Harmonic spectrum of isolated SEPIC as per IEC 61000-3-2 at 265 V AC mains operation.

Fig. 7.16 Output LED load voltage and load current of isolated SEPIC during full load operation. (Scale: Vertical: 20 V/div, 500 mA/div. Horizontal: 10 ms/div.).

Fig. 7.17 Waveforms of start-up stability in isolated SEPIC. (Scale: Vertical: 250 V/div for vs(t), 30 V/div for Vdc and 500 mA/div for Idc. Horizontal: 500 ms/div.

Fig. 7.18 Efficiency comparison between isolated SEPIC and flyback converter.

Fig. 8.1 Configuration of non-isolated Zeta converter.

Fig. 8.2 Modes of operation of PFC Zeta converter in source grounded configuration. (a) Mode I, (b) Mode II.

Fig. 8.3 Operational modes of half-bridge LLC resonant converter for fs(HB) > fr. (a) Mode I, (b) Mode II, (c) Mode III, (d) Mode IV.

Fig. 8.4 Operating waveforms of LLC resonant converter above the resonance frequency.

Fig. 8.5 Equivalent circuit of LLC resonant converter. (a) Non-linear non-sinusoidal circuit, (b) Linear sinusoidal circuit.

Fig. 8.6 Gain vs frequency characteristics of LLC resonant cell.

Fig. 8.7 Open-loop Bode plot of CrCM Zeta converter.

Fig. 8.8 Closed-loop Bode plot of CrCM Zeta converter.

Fig. 8.9 Schematic of Zeta PFC fed LLC resonant converter for an experimental prototype.

Fig. 8.10 Waveforms of the input voltage vs(t) and input current is(t) for input AC voltage operation of 85 V in a two-stage Zeta PFC fed LLC converter. (Scale: Vertical 225V/div, 1.4 A/div; Horizontal 10 ms/div.).

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Fig. 8.11 Waveforms of input voltage vs(t) and input current is(t) for input AC voltage operation of 265V in a two-stage Zeta PFC fed LLC converter.( Scale: Vertical 225 V/div, 1.4 A/div; Horizontal 10 ms/div.).

Fig. 8.12 PF and THDi variations of two-stage Zeta-LLC converter under universal AC mains operations.

Fig. 8.13 Harmonic spectrum of two-stage Zeta-LLC converter at 265 V AC mains operation.

Fig. 8.14 Waveforms of input voltage vs(t), and DC-bus voltage Vbus for input AC voltage operation of 85 V in a Zeta-LLC converter. (Scale: Vertical 200 V/div for vs(t), 100 V/div for Vbus; Horizontal 10 ms/div.).

Fig. 8.15 Waveforms of input voltage vs(t), and DC-bus voltage Vbus for input AC voltage operation of 265 V in a Zeta-LLC converter. (Scale: Vertical 220 V/div for vs(t), 100 V/div for Vbus; Horizontal 10 ms/div.).

Fig. 8.16 Waveforms of input voltage vs(t), and DC-bus voltage Vbus for the bus voltage stability in a Zeta-LLC converter. (Scale: Vertical 245 V/div for vs(t), 135 V/div for Vbus; Horizontal 200 ms/div.).

Fig. 8.17 Waveforms of output voltage, Vdc and output current, Idc for input AC voltage, vs(t) operation of 85 V in a Zeta-LLC converter. (Scale: Vertical 225 V/div for vs(t), 25 V/div for Vdc and 2 A/div for Idc; Horizontal 10 ms/div.).

Fig. 8.18 Waveforms of output voltage, Vdc and output current, Idc for input AC voltage, vs(t) operation of 265 V in a Zeta-LLC converter. (Scale: Vertical 225 V/div for vs(t), 25 V/div for Vdc and 2 A/div for Idc; Horizontal 10 ms/div.).

Fig. 8.19 Drain to source voltage and current waveforms of half-bridge switching MOSFET S3 for input AC voltage operation of 230 V in a Zeta-LLC converter.

(Scale: Vertical 135 V/div, 500 mA/div.; Horizontal 10 ms/div, Zoomed: 9.5 µs/div.)

Fig. 8.20 Efficiency comparisons between the proposed two-stage Zeta-LLC converter and the conventional converters over universal AC mains operations.

Fig. 8.21 Experimental hardware prototype of a two-stage Zeta-LLC converter.

Fig. 9.1 Circuit configuration of two-stage boost PFC fed LLC resonant converter with multi-string LED load.

Fig. 9.2 Voltage gain plot of the LLC resonant network for Lk = 4.

Fig. 9.3 Controller for PFC operation of a boost converter with Type-II compensator.

Fig. 9.4 Open-loop Bode plot of CrCM boost converter.

Fig. 9.5 Closed-loop Bode plot of CrCM boost converter.

Fig. 9.6 Schematic for hardware prototype of a two-stage boost PFC fed LLC resonant converter.

Fig. 9.7 Full load input current waveform under input AC voltage operation of 85 V in a boost-LLC converter. (Scale: Ver. vs(t): 230 V/div., is(t): 2 A/div. Hor. 10 ms/div.).

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Fig. 9.8 Full load input current waveform under input AC voltage operation of 265 V in a boost-LLC converter. (Scale: Ver. vs(t): 230 V/div., is(t): 1.6 A/div. Hor. 10 ms/div.).

Fig. 9.9 PF variations in a two-stage boost-LLC converter over universal AC mains operations.

Fig. 9.10 THDi performances in a two-stage boost-LLC converter over universal AC mains operations.

Fig. 9.11 Spectrum of AC mains current harmonics at 265 V operation in a boost-LLC converter.

Fig. 9.12 Waveforms of output LED voltage and LED current at 85 V AC mains operation in a boost-LLC converter. (Scale: Ver. Vdc: 35 V/div., Idc: 900 mA/div.

Hor. 10 ms/div.).

Fig. 9.13 Waveforms of bus voltage stability during a transition of 85 V to 265 V in a boost-LLC converter. (Scale: Ver. vs(t): 245 V/div., Vbus: 135 V/div. Hor. 200 ms/div.).

Fig. 9.14 Waveforms of bus voltage stability during a transition of 265 V to 85 V in a boost-LLC converter. (Scale: Ver. vs(t): 245 V/div., Vbus: 135 V/div. Hor. 200 ms/div.).

Fig. 9.15 Full load switching waveforms of boost MOSFET, S1 at 85 V AC mains operation. (Scale: Ver. VDS(S1): 120 V/div., ID(S1): 2.2 A/div. Hor. 5 ms/div., for Zoomed: 15 µs/div.).

Fig. 9.16 Full load switching waveforms of HB switching MOSFET, S3 at 265 V AC mains operation. (Scale: Ver. VHB: 120 V/div., ID(S3): 530 mA/div. Hor. 7.5 µs/div.).

Fig. 9.17 Efficiency variations of two-stage boost-LLC converter over universal AC mains operations.

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LIST OF TABLES

Table 3.1 Summary of Calculated and Selected Circuit Parameters for Non-Isolated Luo Converter

Table 3.2 Power Conditions at Different Switching Position of Pilot-Line Dimming Operation

Table 3.3 Electrical Performance Parameters of Luo Converter during Full Load Operation

Table 3.4 Electrical Performance Parameters of Luo Converter at 30% Dimming Load Operation

Table 4.1 Summary of Designed Circuit Parameters for Diode-Tapped and Switch-Tapped Buck-Boost Converters

Table 4.2 Electrical Performance Parameters of Diode-Tapped Buck-Boost Converter in a Step-Down Operation

Table 4.3 Electrical Performance Parameters of Switch-Tapped Buck-Boost Converter in a Step-Up Operation

Table 5.1 Comparisons of Single-Stage, Single-Switch Non-Isolated DC-DC Converters Table 5.2 Summary of Calculated and Selected Design Parameters for CSC Converter Table 5.3 Power Loss Distributions in Different Circuit Elements of CSC Converter Table 5.4 Full Load Electrical Performance Parameters of CSC Converter

Table 5.5 Half Load Electrical Performance Parameters of CSC Converter Table 6.1 Summary of Calculated and Selected Values for Flyback Converter

Table 6.2 Electrical Performance Parameters Recorded from the Hardware Prototype of Flyback Converter

Table 6.3 Power Loss Calculations in Different Circuit Components of Flyback Converter Table 7.1 Summary of Calculated and Selected Design Parameters for Isolated SEPIC Table 7.2 Bill of Materials for Experimental Prototype of Isolated SEPIC

Table 7.3 Comparison between SEPIC and Flyback Converters

Table 7.4 Electrical Performance Parameters during Full Load Operation of Isolated SEPIC

Table 7.5 Electrical Performance Parameters at 50% Dimming Operation of Isolated SEPIC

Table 8.1 Summary of Calculated and Selected Design Parameters of Two-Stage Zeta- LLC Converter

Table 8.2 Experimental Performance Parameters of Zeta PFC fed LLC Resonant Converter

Table 9.1 Summary of Calculated and Selected Design Parameters of Two-Stage Boost- LLC Converter

Table 9.2 Full Load Performance Parameters of Boost PFC fed LLC Resonant Converter Table 9.3 Half Load Performance Parameters of Boost PFC fed LLC Resonant Converter Table 10.1 Outcomes of all the Proposed Converters in General Lighting Applications

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LIST OF ABBREVIATIONS

AC Alternating Current

AM Amplitude Modulation

BW Bandwidth

CCM Continuous Conduction Mode

CCW Counter Clockwise

CFL Compact Fluorescent Lamp

CK Clock

CS Current Sense

CSC Canonical Switching Cell CrCM Critical Conduction Mode

DALI Digital Addressable Lighting Interface DBR Diode Bridge Rectifier

DC Direct Current

DCM Discontinuous Conduction Mode DCVM Discontinuous Capacitor Voltage Mode DICM Discontinuous Inductor Current Mode DPF Displacement Power Factor

DT Diode-Tapped

EMI Electro-Magnetic Interference

GaN Gallium Nitride

GM Gain Margin

GND Ground

HB Half-Bridge

HBLED High-Brightness LED

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xxv HID High-Intensity Discharge

HISLLC Hybrid Input Super Lift Luo Converter IC Integrated Circuits

IoT Internet of Things LED Light-Emitting Diode

MOSFET Metal–Oxide–Semiconductor Field-Effect Transistor op-amp Operational Amplifiers

PCB Printed Circuit Board PCC Point of Common Coupling

PF Power Factor

PFC Power Factor Correction PI Proportional–Integral

PM Phase Margin

POESL Positive Output Elementary Super Lift

PQ Power Quality

PQI Power Quality Improvement PSR Primary-Side Regulation PWM Pulse-Width Modulation

QR Quasi-Resonant

RMS Root Mean Square

SEPIC Single-Ended Primary Inductance Converter

Si Silicon

SIMO Single-Inductor Multiple-Outputs SMPS Switched-Mode Power Supply SSA State-Space Analysis

SSR Secondary-Side Regulation

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xxvi

ST Switch-Tapped

TRIAC Triode For Alternating Current

THDi Total Harmonic Distortion of the input current

UV Ultraviolet

UVLO Under-Voltage Lockout

VCC Voltage Common Collector, the power input of a device WIEO Wide Input and Extreme Output

ZCS Zero-Current Switching ZCD Zero-Crossing Detection ZVS Zero-Voltage Switching

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xxvii

LIST OF SYMBOLS

Cf Filter capacitor after the bridge rectifier C1 Intermediate coupling capacitor

Cdc Output DC capacitor across LED load C(s) Controller transfer function

Cbus DC bus capacitor d1, d2 Duty ratios

D Diode

fl AC line frequency

fs Switching frequency of DC-DC PFC converter Gvd(s) Control-to-output transfer function

Go(s) Open-loop gain Gc(s) Closed-loop gain

Gdc(s) Transfer function of the pulse width generator

H(s) Scaling factor

is(t) Supply AC input current Iin(t) Rectified input AC current

Iin(pk) Peak input current of the AC mains

iL1, iL2 Current through the inductors L1 and L2

ΔiL1, ΔiL2 Ripple current through the inductors L1 and L2

ipri(t) Primary current of the transformer isec(t) Secondary current of the transformer

Ipk(pri) Peak primary current of the transformer

Ipk(sec) Peak secondary current of the transformer

IDS(S1) Drain-source current through the MOSFET S1

Analysis, design and control of DC-DC converters for general lighting systems

ANALYSIS, DESIGN AND CONTROL OF DC-DC CONVERTERS FOR GENERAL LIGHTING SYSTEMS

SOMNATH PAL

DEPARTMENT OF ELECTRICAL ENGINEERING INDIAN INSTITUTE OF TECHNOLOGY DELHI

DECEMBER 2020

© Indian Institute of Technology Delhi (IITD), New Delhi, 2020

ANALYSIS, DESIGN AND CONTROL OF DC-DC CONVERTERS FOR GENERAL LIGHTING SYSTEMS

by

SOMNATH PAL

Department of Electrical Engineering

Submitted

to the

INDIAN INSTITUTE OF TECHNOLOGY DELHI

DECEMBER 2020

CERTIFICATE

ACKNOWLEDGEMENTS

ABSTRACT

साराांश

प्रकाश व्यवस्था (या रोशनी) उस तरह की ववशेषता है जैसे वक वकसी क्षेत्र को प्राकृवतक या कृवत्रम प्रकाश के माध्यम से

मानव आंखों के विए जाना जाता है। प्राकृवतक प्रकाश मुख्य रूप से सूयय से वनकिता है। सूयय के प्रकाश की तीव्रता विन के

िेखा गया है वक पारंपररक तापिीप्त प्रकाश बपबों की जगह ऊजाय-बचत वबकपप एक बड़ा बििाव है। प्रकाश उत्सजयक िायोि

(एिईिी) जैसे नए प्रकाश स्रोतों की खोज में प्रकाश व्यवस्था के विजाइन में क्ांवतकारी बििाव वकए गए हैं। अपने ववशेष

है।

एिईिी ड्राइववंग प्रौद्योवगवकयों को मुख्य रूप से आवश्यक वबजिी की मांग के आिार पर वगीकृत वकया जाता है। इन्हें

गुणवत्ता पर ववचार और िक्षता से संबंवित असंतोषजनक प्रिशयनों को जन्म िेती है। इसके अवतररक्त, अविकांश कन्वटयसय को

यूवनवसयि एसी मेन की एक छोटी सीमा के भीतर संचावित करने के विए विजाइन वकया गया है। कनवटयर वस्थरता काफी

अस्पष्ट है और एिईिी िोि के वनरंतर वोपटेज या वनरंतर करंट संचािन को पूरा नहीं करता है। एिईिी ड्राइव करंट में एक

पररणामस्वरूप, ऊजाय-बचत प्रकाश समािानों पर कई अध्ययन वकए जाते हैं, जो सावहत्य में ररपोटय वकए गए हैं।

इस शोि कायय में, कई िीसी-िीसी कन्वटयसय के ववश्लेषण, विजाइन, वनयंत्रण और ववकास को उपरोक्त कवमयों को

कन्वटयसय को हाई पावर िाइवटंग विमांि्स में विस्कन्टीन्यूस कंिक्शन मोि को वक्वटकि कंिक्शन मोि में पररबवतयत करके

उपयोग वकया गया है। प्रस्ताववत िीसी-िीसी कन्वटयसय में सीआरसीएम संचािन और उवचत वनयंत्रक विजाइन का िाभ उठाते

कायायवन्वत वकया गया है।

यह शोि कायय कम-िागत वािी ऊजाय-बचत विवमंग अविारणाओं पर भी जांच करता है, वजन्हें िीसी-िीसी कन्वटयसय

में एकीकृत वकया गया है और पूरी तरह से रेट्रोवफट वकया गया है। पारंपररक कम िागत वािी विवमंग प्रथाओं में मविम

संचािन के िौरान एसी मेन करंट में अत्यविक हामोवनक कंटेंट की प्राथवमक खामी को संबोवित वकया गया है और प्रस्ताववत

विवमंग अविारणाओं के माध्यम से बेहतर गुणवत्ता वािे प्रिशयन उपिब्ि कराए गए हैं। इसके अिावा, सभी कनवटयर

टोपोिॉजी और विवमंग मॉिि इस शोि कायय में प्रस्तुत वकए गए हैं, जो न्यूनतम सवकयट घटकों का उपयोग कर रहे हैं,

संचािन में ववश्वसनीय हैं, और आगामी एिईिी िाइवटंग समािानों के विए िागू हैं।

TABLE OF CONTENTS

DEVELOPMENT

CONCLUSIONS

LIST OF FIGURES

LIST OF TABLES

LIST OF ABBREVIATIONS

LIST OF SYMBOLS