Design, analysis and applications of Integer and non-integer order digital integrators and differentiators

DESIGN, ANALYSIS AND APPLICATIONS OF INTEGER AND NON - INTEGER ORDER DIGITAL

INTEGRATORS AND DIFFERENTIATORS

MADHU JAIN

INSTRUMENT DESIGN DEVELOPMENT CENTRE INDIAN INSTITUTE OF TECHNOLOGY DELHI

HAUZ KHAS, NEW DELHI - 110016 INDIA

APRIL 2015

© Indian Institute of Technology Delhi (IITD), New Delhi, 2015

DESIGN, ANALYSIS AND APPLICATIONS OF INTEGER AND NON - INTEGER ORDER DIGITAL

INTEGRATORS AND DIFFERENTIATORS

by

MADHU JAIN

INSTRUMENT DESIGN DEVELOPMENT CENTRE

Submitted

in fulfillment of the requirements of the degree of

DOCTOR OF PHILOSOPHY

to the

INDIAN INSTITUTE OF TECHNOLOGY DELHI HAUZ KHAS, NEW DELHI - 110016

INDIA

APRIL 2015

Dedicated To My Son

Shreyansh

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CERTIFICATE

This is to certify that the thesis entitled, “Design, Analysis and Applications of In- teger and Non -Integer Order Digital Integrators and Differentiators,” being submitted by Ms Madhu Jain to Indian Institute of Technology Delhi, for the award of the degree of Doctor of Philosophy is a record of bonafide research work carried out by her under our guidance and the supervision. In our opinion, the thesis has reached the standards of fulfilling the requirements of the regulations relating to the degree.

The results obtained here in have not been submitted in part or full to any other University or Institute for the award of any degree or diploma.

(Dr. N. K. Jain)

Chief Design Engineer (SG)

Instrument Design Development Centre Indian Institute of Technology Delhi New Delhi - 110016, INDIA

(Prof. Maneesha Gupta)

Professor

Division of Electronics and Communication Engineering

Netaji Subhas Institute of Technology New Delhi - 110075, INDIA

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ACKNOWLEDGEMENTS

It gives me immense pleasure to express my sincere gratitude to Dr. N. K. Jain, Chief Design Engineer (SG), Instrument Design Development Centre, Indian Institute of Technology Delhi and Dr. Maneesha Gupta, Professor, Electronics and Communication Engineering Department, Netaji Subhas Institute of Technology Delhi for their invaluable guidance and encouragement throughout the course of this Ph.D. work.

Dr. N.K. Jain and Prof. Maneesha Gupta have guided me at every stage of the re- search. Their support in the form of thought provoking material and guidance has been invaluable and has always been a source of constant inspiration and moral support. It is my privilege to have worked under their supervision.

I am also thankful to Head, Instrument Design Development Centre, Indian Institute of Technology Delhi for the facilities he provided during this work. I owe my deepest gratitude to my student research committee members, Dr. A. K. Agarwala, Prof. D.

T. Shahani, and Prof. G. S. Visweswaran who have given me valuable suggestions and advice to improve the quality of work from time to time during the period of this work.

I am grateful to the staffs of PG section, Central library, and Instrument Design Development Centre library at Indian Institute of Technology Delhi for their valuable co - operation.

I wish to express my sincere thanks to Head, Electronics and Communication Engineering Department, Jaypee Institute of Information Technology, Noida for providing a congenial environment at my workplace.

I am also deeply grateful to all my colleagues and friends of Electronics and Com- munication Engineering Department at Jaypee Institute of Information Technology for their helpful attitude during the entire course of this work.

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I am extremely grateful to lab staff of Project Lab, Electronics and Communication Engineering Department, Jaypee Institute of Information Technology, Noida for providing me immense facilities and assistance to carry out my research work.

I thank the Almighty for showering their blessings to help me in raising my academic level to this stage. They gave me the courage to face the complexities of life and also show me the light of strength, knowledge, wisdom and determination to achieve what I have achieved so far.

I am grateful to my teachers from childhood who laid seeds of enthusiasm and pas- sion in my pursuit of knowledge.

My deepest gratitude is to my parents Mr. P.C. Jain and Mrs. Kamlesh Jain. Their love, affection and inspiration have given me the courage in difficult times.

I gratefully acknowledge my brother Mr. Arun, sister - in - law Ms. Anindya, sister Ms. Raj and brother - in - law Mr. Rajiv for their unconditional love and support.

My special thanks are due to my parent’s - in - law Mr. Vimal Jain and Mrs. Chan- chal Jain for their help and understanding shown to me.

I cordially thank my husband Mr. Anant for his support and motivation, during the course of work. I am eternally grateful to him for always encouraging and being with me where ever and whenever I needed him.

Finally, I wish to express my special thanks to my son Shreyansh for his support throughout this uphill task. He has been very patient and loving when I needed it most.

Date : April, 2015 Place : New Delhi

MADHU JAIN

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ABSTRACT

The investigation in this research work deals with the design, analysis and applications of integer and non-integer or fractional order recursive digital operators (integrators or differentiators). Integrators and differentiators are two most important components of both integer order and fractional order calculus. These operators are the basic parts of many systems like signal processing, control, radar, sonar, communication and medical applications. Integer order operators are useful for those systems which can be modeled using integral calculus. However, for various dynamic systems, integer order operators do not prove adequate to represent the characteristics accurately. For these types of systems, fractional order operators prove more useful as compared to the integer order ones. To effectively analyze complicated systems with fractional elements, it is necessary to develop approximations to the fractional operators using the standard integer order operators.

Main challenge in design of both digital integer order and fractional order integrators and differentiators is to realize ideal magnitude response with linear phase characteristics.

Many methods have been developed to design integer and fractional order operators but they are not able to provide the requisite response characteristics. There is still immense scope of improvement in terms of magnitude and phase response.

In this work, an attempt is made to design integer and fractional order operators with magnitude response close to ideal one and linear phase response. New techniques are applied to design a family of integrators up to fourth order. Some of the existing integrators are linearly interpolated to develop a new integrator of third order. Genetic Algorithm (GA) optimization is used to develop digital integrators up to third order from a recursive transfer function with unknown coefficients. A hybrid optimization method of minimax and pole zero and constant (PZC) optimization is also used to develop integer order digital integrators from a recursive transfer function with unknown coefficients. The minimax

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optimization algorithm based method have tendency that the result may be trapped in the local minimum. Therefore, it is worthwhile to further develop an efficient procedure which attempts to locate the global minimum. Here, pole zero and constant (PZC) optimization is applied on the result of minimax optimization to improve the performance of designed integrators. For this, constant, zeros and poles of the transfer function are rewritten by adding a variable parameter in each. These parameters are varied within a defined lower and upper bound and their optimum values are calculated. This result in integrators with improved magnitude and phase response compared to minimax optimized integrators. GA has an advantage that it can efficiently search large solution spaces due to its parallel structure. However, it suffers from disadvantages of lack of global search ability and premature convergence. The limitation of GA is overcome by PZC optimization which improves the efficiency of the designed integrators. A half delay is also introduced in the trapezoidal integration rule to design integrators up to fourth order. These new integrators are much more efficient compared to the trapezoidal integrator in terms of magnitude and linear phase response. New integer order differentiators are also obtained by inverting and modifying the transfer function of proposed integrators.

Proposed integer order integrators and differentiators are analyzed in time domain by observing their square and triangular wave responses, respectively. Simulation results show that the proposed operators outperformed the existing ones in time and frequency domain analysis.

Fractional order integrators are designed by applying direct and in direct discretization on some of the existing integer order operators using continued fraction expansion. Integer order operators, designed in this work having excellent performance are chosen for half order integrators design. Their frequency responses are compared and operator producing half order integrator with highest efficiency is selected to design integrators of other

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fractional powers also. For this, not only continued fraction expansion but other techniques like Taylor series expansion and rational Chebyshev approximation are also used. New fractional order differentiators are also obtained by using the transfer function of proposed fractional order integrators appropriately.

Comparison of the suggested fractional order operators with the existing ones show remarkable improvement in frequency response. Square wave response for integrators and triangular wave response of differentiators are also observed to show their effectiveness.

Applications of proposed integer and fractional order operators for image processing and control are also investigated in this thesis. Proposed integer order differentiators are tested for edge detection. It is found that these perform well for noiseless images. However, for images having strong noise content, their performances gets degraded. Solution is also provided in this work by proposing a new edge detection algorithm based on the combination of fractional order integrators and differentiators. Simulation results show that the proposed algorithm is effective in both noiseless and noisy conditions. Its performance is also better than that of other algorithms for noisy images. The same is successfully implemented on hardware DSK TMS320C6713 for non real time images. However, same procedure can be used for real time images also.

Simulation results also show the effectiveness of proposed integer and fractional order Proportional-Integral-Derivative (PID) controllers for speed control of DC motor with excellent steady state and transient response. The designed PID controllers are also implemented using Arduino mega 2560, and it can be seen that their performance validates the results obtained using simulation.

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TABLE OF CONTENTS

CERTIFICATE i

ACKNOWLEDGEMENTS iii

ABSTRACT v

TABLE OF CONTENTS ix

LIST OF FIGURES xv

LIST OF TABLES xxiii

LIST OF SYMBOLS xxv

LIST OF ABBREVIATIONS xxvii

1. INTRODUCTION 1

1.1 Background and Motivations 1

1.2 Scope of Proposed Research Work 6

1.3 Organization of Thesis 8

1.4 Summary of Dissertation Contribution 9

2. LITERATURE SURVEY 11

2.1 Introduction 11

2.2 Integer Order Calculus 11

2.2.1 Design Methods for Digital Integer Order Integrators 12 2.2.1.1 Numerical Integration Rules Based Methods 12 2.2.1.2 Interpolation Methods 14

2.2.1.3 Fractional Delay Methods 14

2.2.1.4 Optimization Based Methods 15

2.2.2 Design Method for Digital Integer Order Differentiators 16

2.2.3 Existing Integer Order Differintegrators 17

2.3 Fractional Order Calculus 24

2.3.1 Design Method for Digital Fractional Order Differintegrators 25 2.3.1.1 Direct Discretization Method 26 2.3.1.2 Indirect Discretization Method 26 2.3.2 Existing Fractional Order Digital Differintegrators 26

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2.4 Image Processing and System Control Applications 30

2.4.1 Edge Detection 30

2.4.1.1 First Order Derivative Based Edge Detection Methods 30

2.4.1.2 Gaussian Based Edge Detectors 30

2.4.1.3 Edge Detection Using Artificial Intelligence, Morphological

and Wavelet Methods 31

2.4.1.4 Edge Detection Using Integer / Fractional Order

Differentiators 32

2.4.2 Speed Control of DC Motor 33

2.4.2.1 Conventional Controllers 34

2.4.2.2 Controllers Based on Evolutionary Algorithms 36

2.5 Conclusions 37

3. DESIGN OF NEW INTEGER ORDER DIFFERINTEGRATORS 39

3.1 Introduction 39

3.2 Linear Interpolation Method 40

3.3 Genetic Algorithm Optimization Method 48

3.4 Minimax and Pole, Zero & Constant (PZC) Optimization Method 58

3.5 GA and PZC Optimization Method 69

3.6 Fractional Delay Method 74

3.7 Comparison of Proposed Integer Order Integrators With Existing Ones 82

3.7.1 Frequency Domain Analysis 83

3.7.2 Time Domain Analysis 89

3.8 Comparison of Proposed Integer Order Differentiators With Existing Ones 90

3.8.1 Frequency Domain Analysis 91

3.8.2 Time Domain Analysis 96

3.9 Conclusions 99

4. DESIGN OF NEW NON- INTEGER (FRACTIONAL) ORDER

DIFFERINTEGRATORS 103

4.1 Introduction 103

4.2 Design of HODI Models Using CFE Based Indirect Discretization Method 104

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4.2.1 Design of HODI Models Using Existing Integer Order Differentiators 106 4.2.1.1 Design of HODIs Using Gupta-Jain-Kumar 1 Differentiator 106 4.2.1.2 Design of HODIs Using Upadhyay et al. Differentiator 112 4.2.2 HODI Models Based on Discretization by Proposed Integer Order

Differentiators 115

4.2.2.1 Design of HODIs Using GA+PZC Optimized First Order

Differentiator 115 4.2.2.2 Design of HODIs Using GA+PZC Optimized Second Order

Differentiator 119 4.2.2.3 Design of HODIs Using MO+PZC Optimized Second Order

Differentiator 123 4.2.2.4 Design of HODIs Using GA+PZC Optimized Third Order

Differentiator 126 4.2.2.5 Design of HODIs Using MO+PZC Optimized Third Order

Differentiator 130 4.2.2.6 Design of HODIs Using MO+PZC Optimized Fourth Order

Differentiator 133 4.3 HODI Models Using Direct Discretization Method 136

4.3.1 HODI Models Based on Discretization by Existing Integer order

Integrators 136 4.3.1.1 Design of HODIs Using Gupta-Jain-Kumar 1 Integrator 137

4.3.1.2 Design of HODIs Using Upadhyay et al. Integrator 141 4.3.2 HODI Models Based on Discretization by Proposed Integer Order

Integrators 145 4.3.2.1 Design of HODIs Using GA+PZC Optimized First Order

Integrator 145 4.3.2.2 Design of HODIs Using GA+PZC Optimized Second Order

Integrator 150 4.3.2.3 Design of HODIs Using MO+PZC Optimized Second Order

Integrator 154 4.3.2.4 Design of HODIs Using GA+PZC Optimized Third Order

Integrator 158 4.3.2.5 Design of HODIs Using MO+PZC Optimized Third Order

Integrator 162 4.3.2.6 Design of HODIs Using MO+PZC Optimized Fourth Order

Integrator 166

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4.4 Comparison Between the Results of Direct and Indirect Discretization

Methods 169

4.5 Design of FODI Models Using MO+PZC Optimized Third Order Integrator

by Direct Discretization Method 175

4.5.1 FODI Models via CFE 175

4.5.2 FODI Models via TSE 181

4.5.3 FODI Models via RCA 186

4.6 Comparison of Proposed FOIs With Existing Ones 192

4.6.1 Frequency Domain Analysis 192

4.6.2 Time Domain Analysis 195

4.7 Comparison of Proposed FODs With Existing Ones 197

4.7.1 Frequency Domain Analysis 197

4.7.2 Time Domain Analysis 200

4.8 Conclusions 204

5. APPLICATION OF PROPOSED OPERATORS IN IMAGE PROCESSING

AND CONTROL 207

5.1 Introduction 207

5.1.1 Image Edge Detection 207

5.1.2 Proportional - Integral - Derivative (PID) Controller 208

5.2 Application in Edge Detection 209

5.2.1 Analysis of Proposed Integer Order Differentiators for Edge Detection 209 5.2.2 Design and Analysis of New Edge Detection Algorithm 216 5.2.3 Visual and Quantitative Comparison of Proposed Edge Detection

Algorithm with Existing Algorithms 223

5.2.4 Hardware Implementation of Proposed Edge Detection Algorithm on

DSK TMS320C6713 238

5.3 Application in Control System 242

5.3.1 Design of PID Controllers Using Integer and Fractional Order Differintegrators for Speed Control of DC Motor 242

5.3.2 Mathematical Model of DC Motor 243

5.3.3 Design and Analyses of Proposed Integer and Fractional Order PID

Controllers 247

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5.3.4 Hardware Implementation of Proposed PID Controllers on Hardware

Arduino Mega 2560 256

5.4 Conclusions 259

6. CONCLUSION 261

6.1 General 261

6.2 Main Conclusions 261

6.3 Future scope 266

REFERENCES 267

LIST OF PUBLICATIONS 283

BIODATA 285

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LIST OF FIGURES

Figure 3.1: Flow chart for interpolation method ...42

Figure 3.2: (a) Magnitude response, (b) PARE response and (c) Phase response of designed integrators: HI1(z), HI2(z), HI3(z), HI4(z) and HI5(z).. ... 44

Figure 3.3: Group delay response of designed integrators; HI1(z), HI2(z), HI3(z), HI4(z) and HI5(z).. ... 45

Figure 3.4: Frequency response of designed differentiators; DI1(z), DI2(z), DI3(z), DI4(z) and DI5(z).… ... 47

Figure 3.5: Flow chart of Genetic Algorithm optimization method ... 49

Figure 3.6: Frequency response of GA designed first order integrators ... 53

Figure 3.7: Frequency response of GA designed second order integrators... 54

Figure 3.8: Frequency response of GA designed third order integrators... 55

Figure 3.9: Frequency response of GA designed differentiators; DGA1(z), DGA2(z) and DGA3(z)... 57

Figure 3.10: Flow chart of MO and PZC optimization method ... 58

Figure 3.11: Flow chart of the applied minimax optimization method ... 59

Figure 3.12: Frequency response of designed integrators; HMO2(z), HMO3(z), HMO4(z), HMO+PZC2(z), HMO+PZC3(z) and HMO+PZC4(z) ... 66

Figure 3.13: Frequency response of designed differentiators; D2MO(z), D3MO(z), D4MO(z), D2MO+PZC(z), D3MO+PZC(z) and D4MO+PZC(z). ... 68

Figure 3.14: Flow chart of GA and PZC optimization method ... 69

Figure 3.15: Frequency response of designed integrators; HGA1(z), HGA2(z), HGA3(z), HGA+PZC1(z), HGA+PZC2(z) and HGA+PZC3(z) ... 71

Figure 3.16: Frequency response of designed differentiators; DGA1(z), DGA2(z), DGA3(z), DGA+PZC1(z), DGA+PZC2(z) and DGA+PZC3(z). ... 73

Figure 3.17: Flow chart of linear programming optimization method for designing integrators with half sample delay ... 77

Figure 3.18: Frequency response of proposed half sample delay integrators; HFD1(z), HFD2(z), HFD3(z) and HFD4(z) and trapezoidal integrator HT(z) ... 79

Figure 3.19: Frequency response of proposed half sample delay differentiators; DFD1(z), DFD2(z), DFD3(z) and DFD4(z).. ... 81

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Figure 3.20: PARE response of (a) Proposed and (b) Existing integer order integrators [14, 18, 34 - 35, 37, 39] ... 84 Figure 3.21: Group delay response of (a) Proposed and (b) Existing integer order

integrators [14, 18, 34 - 35, 37, 39]... 87 Figure 3.22: Square wave response of (a) Proposed and (b) Existing integer order

integrators [14, 18, 34 - 35, 37, 39]... 90 Figure 3.23: PARE response of (a) Proposed and (b) Existing integer order differentia-

tors [14, 33 - 34, 37, 39] ... 92 Figure 3.24: Group delay response of (a) Proposed and (b) Existing integer order

differentiators [14, 33 - 34, 37, 39] ... 95 Figure 3.25: Triangular wave response of (a) Proposed and (b) Existing integer order

differentiators [14, 33 - 34, 37, 39] ... 97 Figure 3.26: Impulse response of (a) Proposed and (b) Existing integer order differen-

tiators [14, 33 - 34, 37, 39] ... 98 Figure 4.1: (a) Magnitude and (b) Phase response of third order Gupta-Jain-Kumar 1

differentiator [34] based HOIs; H0.5_GJK1_3(z), H0.5_GJK1_5 ... 108 Figure 4.2: (a) PARE and (b) Group delay response of third order Gupta-Jain-Kumar 1

differentiator [34] based HOIs; H0.5_GJK1_3(z) and H0.5_GJK1_5(z) ... 109 Figure 4.3: Frequency response of third order Gupta-Jain-Kumar 1 differentiator [34]

based HODs; D0.5_GJK1_3(z) and D0.5_GJK1_5(z). ... 111 Figure 4.4: Frequency response of second order Upadhyay et al. differentiator [37]

based HOIs; H0.5_US_2(z), H0.5_US_4(z) and H0.5_US_5(z) ... 113 Figure 4.5: Frequency response of second order Upadhyay et al. differentiator [37]

based HODs; D0.5_US_2(z), D0.5_US_4(z) and D0.5_US_5(z). ... 114 Figure 4.6: Frequency response of GA+PZC optimized first order differentiator based

HOIs; H0.5_GA+PZC1_1(z), H0.5_GA+PZC1_2(z), H0.5_GA+PZC1_3(z),

H0.5_GA+PZC1_4(z) and H0.5_GA+PZC1_5(z) ... 117 Figure 4.7: Frequency response of GA+PZC optimized first order differentiator based

HODs; D0.5_GA+PZC1_1(z), D0.5_GA+PZC1_2(z), D0.5_GA+PZC1_3(z),

D0.5_GA+PZC1_4(z) and D0.5_GA+PZC1_5(z) ... 118 Figure 4.8: Frequency response of GA+PZC optimized second order differentiator

based HOIs; H0.5_GA+PZC2_2(z), H0.5_GA+PZC2_4(z) and H0.5_GA+PZC2_5(z) ... 120 Figure 4.9: Frequency response of GA+PZC optimized second order differentiator

based HODs; D0.5_GA+PZC2_2(z), D0.5_GA+PZC2_4(z) and D0.5_GA+PZC2_5(z) ... 122 Figure 4.10: Frequency response of MO+PZC optimized second order differentiator

based HOIs; H0.5_MO+PZC2_2(z), H0.5_MO+PZC2_4(z) and H0.5_MO+PZC2_5(z) ... 124

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Figure 4.11: Frequency response of MO+PZC optimized second order differentiator

based HODs; D0.5_MO+PZC2_2(z), D0.5_MO+PZC2_4(z) and D0.5_MO+PZC2_5(z) ... 125 Figure 4.12: Frequency response of GA+PZC optimized third order differentiator based

HOIs; H0.5_GA+PZC3_3(z) and H0.5_GA+PZC3_5(z) ... 127 Figure 4.13: Frequency response of GA+PZC optimized third order differentiator based

HODs; D0.5_GA+PZC3_3(z) and D0.5_GA+PZC3_5(z) ... 129 Figure 4.14: Frequency response of MO+PZC optimized third order differentiator

based HOIs; H0.5_MO+PZC3_3(z) and H0.5_MO+PZC3_5(z) ... 131 Figure 4.15: Frequency response of MO+PZC optimized third order differentiator

based HODs; D0.5_MO+PZC3_3(z) and D0.5_MO+PZC3_5(z) ... 132 Figure 4.16: Frequency response of MO+PZC optimized fourth order differentiator

based HOIs; H0.5_MO+PZC4_4(z) and H0.5_MO+PZC4_5(z) ... 134 Figure 4.17: Frequency response of MO+PZC optimized fourth order differentiator

based HODs; D0.5_MO+PZC4_4(z) and D0.5_MO+PZC4_5(z) ... 135 Figure 4.18: Frequency response of third order Gupta-Jain-Kumar 1 integrator [34]

based HOIs; H0.5_GJK1_d3(z), H0.5_GJK1_d4(z) and H0.5_GJK1_d5(z). ... 139 Figure 4.19: Frequency response of third order Gupta-Jain-Kumar 1 integrator [34]

based HODs; D0.5_GJK1_d3(z), D0.5_GJK1_d4(z) and D0.5_GJK1_d5(z). ... 140 Figure 4.20: Frequency response of second order Upadhyay et al. integrator [37] based

HOIs; H0.5_US_d2(z), H0.5_US_d3(z), H0.5_US_d4(z) and H0.5_US_d5(z). ... 142 Figure 4.21: Frequency response of second order Upadhyay et al. integrator [37] based

HODs; D0.5_US_d2(z), D0.5_US_d3(z), D0.5_US_d4(z) and D0.5_US_d5(z). ... 144 Figure 4.22: Frequency response of GA+PZC optimized first order integrator based

HOIs; H0.5_GA+PZC1_d1(z), H0.5_GA+PZC1_d2(z), H0.5_GA+PZC1_d3(z),

H0.5_GA+PZC1_d4(z) and H0.5_GA+PZC1_d5(z). ... 147 Figure 4.23: Frequency response of GA+PZC optimized first order integrator based

HODs; D0.5_GA+PZC1_d1(z), D0.5_GA+PZC1_d2(z), D0.5_GA+PZC1_d3(z),

D0.5_GA+PZC1_d4(z) and D0.5_GA+PZC1_d5(z)…….. ... 149 Figure 4.24: Frequency response of GA+PZC optimized second order integrator based

HOIs; H0.5_GA+PZC2_d2(z), H0.5_GA+PZC2_d3(z), H0.5_GA+PZC2_d4(z) and

H0.5_GA+PZC2_d5(z) ... 151 Figure 4.25: Frequency response of GA+PZC optimized second order integrator based

HODs; D0.5_GA+PZC2_d2(z), D0.5_GA+PZC2_d3(z), D0.5_GA+PZC2_d4(z) and

D0.5_GA+PZC2_d5(z). ... 153 Figure 4.26: Frequency response of MO+PZC optimized second order integrator based

HOIs; H0.5_MO+PZC2_d2(z), H0.5_MO+PZC2_d3(z), H0.5_MO+PZC2_d4(z) and

H0.5_MO+PZC2_d5(z). ... 155

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Figure 4.27: Frequency response of MO+PZC optimized second order integrator based HODs; D0.5_MO+PZC2_d2(z), D0.5_MO+PZC2_d3(z), D0.5_MO+PZC2_d4(z) and

D0.5_MO+PZC2_d5(z). ... 157 Figure 4.28: Frequency response of GA+PZC optimized third order integrator based

HOIs; H0.5_GA+PZC3_d3(z), H0.5_GA+PZC3_d4(z) and H0.5_GA+PZC3_d5(z). ... 159 Figure 4.29: Frequency response of GA+PZC optimized third order integrator based

HODs; D0.5_GA+PZC3_d3(z), D0.5_GA+PZC3_d4(z) and D0.5_GA+PZC3_d5(z). ... 161 Figure 4.30: Frequency response of MO+PZC optimized third order integrator based

HOIs; H0.5_MO+PZC3_d3(z), H0.5_MO+PZC3_d4(z) and H0.5_MO+PZC3_d5(z). ... 163 Figure 4.31: Frequency response of MO+PZC optimized third order integrator based

HODs; D0.5_MO+PZC3_d3(z), D0.5_MO+PZC3_d4(z) and D0.5_MO+PZC3_d5(z) ... 165 Figure 4.32: Frequency response of MO+PZC optimized fourth order integrator based

HOIs; H0.5_MO+PZC4_d4(z) and H0.5_MO+PZC4_d5(z). ... 167 Figure 4.33: Frequency response of MO+PZC optimized fourth order integrator based

HODs; D0.5_MO+PZC4_d4(z) and D0.5_MO+PZC4_d5(z)... 168 Figure 4.34: Frequency response of MO+PZC optimized third order integrator based

FOIs using CFE; HPC,0.1(z), HPC,0.2(z), HPC,0.3(z), HPC,0.4(z), HPC,0.5(z),

HPC,0.6(z), HPC,0.7(z), HPC,0.8(z) and HPC,0.9(z). ... 178 Figure 4.35: Frequency response of MO+PZC optimized third order integrator based

FODs using CFE; DPC,0.1(z), DPC,0.2(z), DPC,0.3(z), DPC,0.4(z), DPC,0.5(z),

DPC,0.6(z), DPC,0.7(z), DPC,0.8(z) and DPC,0.9(z). ... 180 Figure 4.36: Frequency response of MO+PZC optimized third order integrator based

FOIs using TSE; HPT,0.1(z), HPT,0.2(z), HPT,0.3(z), HPT,0.4(z), HPT,0.5(z),

HPT,0.6(z), HPT,0.7(z), HPT,0.8(z) and HPT,0.9(z).. ... 184 Figure 4.37: Frequency response of MO+PZC optimized third order integrator based

FODs using TSE; DPT,0.1(z), DPT,0.2(z), DPT,0.3(z), DPT,0.4(z), DPT,0.5(z),

DPT,0.6(z), DPT,0.7(z), DPT,0.8(z) and DPT,0.9(z). ... 185 Figure 4.38: Frequency response of MO+PZC optimized third order integrator based

FOIs using RCA; HPR,0.1(z), HPR,0.2(z), HPR,0.3(z), HPR,0.4(z), HPR,0.5(z),

HPR,0.6(z), HPR,0.7(z), HPR,0.8(z) and HPR,0.9(z). ... 188 Figure 4.39: Frequency response of MO+PZC optimized third order integrator based

FODs using RCA; DPR,0.1(z), DPR,0.2(z), DPR,0.3(z), DPR,0.4(z), DPR,0.5(z),

DPR,0.6(z), DPR,0.7(z), DPR,0.8(z) and DPR,0.9(z). ... 190 Figure 4.40: (a) PARE and (b) Group delay response of existing FOIs [60, 62 - 64]. ... 193 Figure 4.41: Square wave response of (a) Proposed RCA based FOIs, (b) Proposed

CFE based FOIs and (c) Existing FOIs [60, 62 - 64] ... 196 Figure 4.42: (a) PARE and (b) Group delay response of existing FODs [60, 61, 63]... 198

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Figure 4.43: Triangular wave response of (a) Proposed RCA based FODs, (b) Proposed CFE based FODs and (c) Existing FODs [60, 61, 63] ... 201 Figure 4.44: Impulse response of (a) Proposed RCA based FODs, (b) Proposed CFE

based FODs and (c) Existing FODs [60, 61, 63] ... 203 Figure 5.1: Flow chart of edge detection algorithm using integer order differentiators ... 209 Figure 5.2: Edge detection of “Lena” image using proposed integer order differentia-

tors; DGA+PZC1(z), DGA+PZC2(z), DMO+PZC2(z), DGA+PZC3(z), DMO+PZC3(z) and

DMO+PZC4(z) ... 212 Figure 5.3: Edge detection on noisy “Lena” image using proposed integer order diffe-

rentiators; DGA+PZC1(z), DGA+PZC2(z), DMO+PZC2(z), DGA+PZC3(z), DMO+PZC3(z) and DMO+PZC4(z) ... 213 Figure 5.4: Edge detection of “factory trawler” image using proposed integer order

differentiators; DGA+PZC1(z), DGA+PZC2(z), DMO+PZC2(z), DGA+PZC3(z),

DMO+PZC3(z) and DMO+PZC4(z) ... 214 Figure 5.5: Edge detection of noisy “factory trawler” image using proposed integer

order differentiators; DGA+PZC1(z), DGA+PZC2(z), DMO+PZC2(z), DGA+PZC3(z),

DMO+PZC3(z) and DMO+PZC4(z) ... 215 Figure 5.6: Flow chart of proposed edge detection algorithm ... 217 Figure 5.7: Edge detection of noiseless “Lena” image using different combinations of

FOIs HPR,Į(z) and FODs DPR,ȕ(z) with the condition Į + ȕ = 1 ... 218 Figure 5.8: Edge detection of noisy “Lena” image using different combinations of

FOIs HPR,Į(z) and FODs DPR,ȕ(z) with the condition Į + ȕ = 1 ... 219 Figure 5.9: Edge detection of noiseless “Lena” image using different combinations of

FOIs HPC,Į(z) and FODs DPC,ȕ(z) with the condition Į + ȕ = 1 ... 220 Figure 5.10: Edge detection of noisy “Lena” image using different combinations of

FOIs HPC,Į(z) and FODs DPC,ȕ(z) with the condition Į + ȕ = 1 ... 221 Figure 5.11: Edge detection of (a) noiseless “factory trawler” image using (a) HPR,0.1(z),

DPR,0.9(z) and (b) HPC,0.1(z), DPC,0.9(z) ... 222 Figure 5.12: Edge detection of noisy “factory trawler” image using (a) HPR,0.1(z),

DPR,0.9(z) and (b) HPC,0.1(z), DPC,0.9(z) ... 222 Figure 5.13: (a) Original test-1 image and (b) Noisy test-1 gray image ... 224 Figure 5.14: Edge detection of noisy test-1 image using proposed fractional order

FODIs; (a) HPR,0.1(z), DPR,0.9(z), (b) HPC,0.1(z), DPC,0.9(z) and integer order differentiator (c) DMO+PZC3(z) ... 225 Figure 5.15: Edge detection of noisy test-1 image using fractional order differentiators;

DK,0.25(z) [60] and DK,0.5(z) [60]. ... 225

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Figure 5.16: Edge detection of noisy test-1 image by classical operators [67 - 70, 75]... 226

Figure 5.17: Edge detection of noisy test-1 image by existing integer order differentia- tors; DA3(z) [33], DGJK1(z) [34], DUS(z) [37] and DG4(z) [39] ... 226

Figure 5.18: (a) Original test-2 image and (b) Noisy gray image ... 227

Figure 5.19: Edge detection of noisy test-2 image using proposed fractional order FODIs; (a) HPR,0.1(z), DPR,0.9(z), (b) HPC,0.1(z), DPC,0.9(z) and integer order differentiator (c) DMO+PZC3(z) ... 227

Figure 5.20: Edge detection of noisy test-2 image using fractional order differentiators; DK,0.25(z) [60] and DK,0.5(z) [60]. ... 228

Figure 5.21: Edge detection of noisy test-2 image by classical operators [67 - 70, 75]... 228

Figure 5.22: Edge detection of noisy test-2 image by existing integer order differentia- tors; DA3(z) [33], DGJK1(z) [34], DUS(z) [37] and DG4(z) [39] ... 229

Figure 5.23: (a) Synthetic image, (b) Noisy image and (c) True edge image ... 230

Figure 5.24: Edge detection of noisy synthetic image using different combinations of FOIs HPR,Į(z) and FODs DPR,ȕ(z) with the condition Į + ȕ = 1 ... 231

Figure 5.25: Edge detection of noisy synthetic image using different combinations of FOIs HPC,Į(z) and FODs DPC,ȕ(z) with the condition Į + ȕ = 1 ... 232

Figure 5.26: Edge detection of noisy synthetic image by classical operators [67 - 70, 75]. ... 233

Figure 5.27: Edge detection of noisy synthetic image by integer order differentiators proposed; DGA+PZC1(z), DGA+PZC2(z), DMO+PZC2(z), DGA+PZC3(z), DMO+PZC3(z), DMO+PZC4(z) and existing; DA3(z) [33], DGJK1(z) [34], DUS(z) [37] and DG4(z) [39] ... 234

Figure 5.28: Edge detection of noisy synthetic image using fractional order differentia- tors DK,0.25(z) [60] and DK,0.5(z) [60]. ... 235

Figure 5.29: Edge detection of noisy synthetic image using proposed edge detection algorithm on existing FODIs; HK,0.5(z), DK,0.5(z) [60] and HYG,0.5(z), DYG,0.5(z) [63] ... 235

Figure 5.30: Block diagram of DSK TMS320C6713 [134] ... 239

Figure 5.31: MATLAB Simulink and CCS Link. ... 239

Figure 5.32: (a) TMS320C6713 DSK board and (b), (c) Responses ... 241

Figure 5.33: Block diagram of closed loop control system using PID controller ... 243

Figure 5.34: Equivalent circuit of DC series motor ... 244

Figure 5.35: DC motor speed control system block diagram ... 248

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Figure 5.36: Step response of proposed integer order PID controllers ... 250

Figure 5.37: Step response of proposed fractional order PID controllers using HPC,Į(z) and DPC,ȕ(z) ... 251

Figure 5.38: Step response of proposed fractional order PID controllers using HPR,Į(z) and DPR,ȕ(z) ... 251

Figure 5.39: Step response of existing integer [34, 37, 39] and fractional order differin- tegrators [60, 63] based PID controllers ... 255

Figure 5.40: Arduino Mega 2560 board [136 - 137] ... 256

Figure 5.41: Hardware setup of DC motor speed control ... 257

Figure 5.42: Block diagram of MATLAB Simulink and Arduino 2560 Link. ... 257

Figure 5.43: Block diagram of a subsystem on Simulink ... 258

Figure 5.44: Results of hardware implementation ... 259

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LIST OF TABLES

Table 3.1: Transfer functions of new integrators using interpolation method…...43

Table 3.2: GA specifications... ... 51

Table 3.3: Coefficients of designed first order integrators using GA... ... 51

Table 3.4: Coefficients of designed second order integrators using GA.….. ... 51

Table 3.5: Coefficients of designed third order integrators using GA ... 52

Table 3.6: Coefficients for minimax optimized second order integrators ... 61

Table 3.7: Coefficients for minimax optimized third order integrators… ………. ... 62

Table 3.8: Coefficients for minimax optimized fourth order integrators ………. ... 62

Table 3.9: Proposed integrators using fractional delay method. ... 75

Table 3.10: Constraint for fractional delay method ... 76

Table 3.11: Comparison of proposed integer order integrators with existing ones [14, 18, 34 - 35, 37, 39] in terms of PARE response ... 85

Table 3.12: Comparison of proposed integer order integrators with existing ones [14, 18, 34 - 35, 37, 39] in terms of group delay response ... 88

Table 3.13: Comparison of proposed integer order differentiators with existing ones [14, 33 - 34, 37, 39] in terms of PARE response ... 93

Table 3.14: Comparison of proposed integer order differentiators with existing ones [14, 33 - 34, 37, 39] in terms of group delay response ... 94

Table 4.1: Rational approximation of (s)^±0.5 in s - domain ... 106

Table 4.2: Gupta-Jain-Kumar 1 differentiator [34] based HOIs ... 107

Table 4.3: Upadhyay et al. differentiator [37] based HOIs. ... 112

Table 4.4: GA+PZC optimized first order differentiator based HOIs ... 116

Table 4.5: GA+PZC optimized second order differentiator based HOIs. ... 119

Table 4.6: MO+PZC optimized second order differentiator based HOIs ... 123

Table 4.7: GA+PZC optimized third order differentiator based HOIs ... 126

Table 4.8: MO+PZC optimized third order differentiator based HOIs ... 130

Table 4.9: MO+PZC optimized fourth order differentiator based HOIs ... 133

Table 4.10: Gupta-Jain-Kumar 1 integrator [34] based HOIs ... 138

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Table 4.11: Upadhyay et al. integrator [37] based HOIs ... 141

Table 4.12: GA+PZC optimized first order integrator based HOIs ... 146

Table 4.13: GA+PZC optimized second order integrator based HOIs ... 150

Table 4.14: MO+PZC optimized second order integrator based HOIs ... 154

Table 4.15: GA+PZC optimized third order integrator based HOIs ... 158

Table 4.16: MO+PZC optimized third order integrator based HOIs ... 162

Table 4.17: MO+PZC optimized fourth order integrator based HOIs ... 166

Table 4.18: Comparison of the designed first order (a) HOIs and (b) HODs. ... 169

Table 4.19: Comparison of the designed second order (a) HOIs and (b) HODs... 170

Table 4.20: Comparison of the designed third order (a) HOIs and (b) HODs. ... 171

Table 4.21: Comparison of the designed fourth order (a) HOIs and (b) HODs. ... 172

Table 4.22: Comparison of the designed fifth order (a) HOIs and (b) HODs. ... 173

Table 4.23: Proposed CFE based FOIs (a) Unstable and (b) Stable …….. ... 176

Table 4.24: Proposed TSE based FOIs. ... 182

Table 4.25: Proposed RCA based FOIs ... 187

Table 4.26: Comparison of proposed FOIs with existing ones [60, 62 - 64]. ... 194

Table 4.27: Comparison of proposed FODs with existing ones [60, 61, 63]. ... 199

Table 5.1: Comparison of RMSE for edge detection of noisy synthetic image ... 236

Table 5.2: Execution time of edge detection algorithms on noisy synthetic image ... 237

Table 5.3: DC motor specifications ... 246

Table 5.4: GA parameters for design of PID controllers ... 250

Table 5.5: Comparison of integer and fractional order PID controllers ... 253

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LIST OF SYMBOLS

ȳ ¥-1

Ȧ Angular frequency in radians Ȧm Angular Velocity

I Armature Current

L Armature Inductance

R Armature Resistance

E Back emf (Electromotive Force) e(t) Control Error, equals to r(t) - y(t) u(t) Control signal generated by controller

࡛C Crossover Probability V DC Source Voltage Kd Derivative Gain

IJe Electrical Time Constant Te Electrical Torque

ke Electromotive Force Constant D Fractional Delay

PI^ĮD^ȕ Fractional Order Controller

Įt

aD Fractional Order Operator, a and t are limits and Į is the order of operation kf Friction Constant

*(x) Gamma Function of x Gx, Gy Gradients

IJg(Ȧ) Group delay

(s)^±Į Ideal fractional order differintegrator

xxvi (s)^±1 Ideal integer order differintegrator

Ki Integral Gain

Ȗ Interpolation Ratio (0 < Ȗ < 1) CL Length of the chromosome TL Mechanical Load

IJm Mechanical Time Constant J Moment of Inertia

y(t) Motor Output

࡛M Mutation Probability N Order of the integrator P Population Size Kp Proportional Gain

R Radius of unstable pole in any transfer function r(t) Reference/ Set point

T Sampling Period kt Torque Constant

μ Value of maximum PARE

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LIST OF ABBREVIATIONS

ASP Analog signal processing A/D Analog to Digital

CCS Code Composer Studio CFE Continued Fraction Expansion

CPLD Complex Programmable Logic Device DSP Digital signal processing

DSPs Digital Signal Processors D/A Digital to Analog

DC Direct Current DSK DSP Starter Kit

DIP Dual in - Line Package

DRAM Dynamic Random Access Memory ECG Electrocardiogram

EEG Electroencephalogram EMF Electromotive Force

FIR Finite Impulse Response FODs Fractional Order Differentiators FODIs Fractional Order Differintegrators

FOIs Fractional Order Integrators GA Genetic Algorithm

HODs Half Order Differentiators HODIs Half Order Differintegrators

HOIs Half Order Integrators IIR Infinite Impulse Response

xxviii ITAE Integral of the Time Absolute Error

IP Integral – Proportional ICs Integrated Circuits

IDE Integrated Development Environment JTAG Joint Test Action Group

LT Laplace Transform LOG Laplacian of Gaussian LEDs Light Emitting Diodes

MO Minimax Optimization NI National Instruments

PARE Percentage Absolute Relative Error PIC Peripheral Interface Controller PZC Pole, Zero & Constant

P Proportional

PI Proportional – Integral

PID Proportional - Integral – Derivative RCA Rational Chebyshev Approximation RTDX Real Time Data Exchange

RMSE Root Mean Square Error SNR Signal to Noise Ratio TSE Taylor’s Series Expansion

TI Texas Instruments USB Universal Serial Bus